参数资料
型号: ICS1893BFLFT
厂商: IDT, Integrated Device Technology Inc
文件页数: 110/133页
文件大小: 0K
描述: PHYCEIVER LOW PWR 3.3V 48-SSOP
标准包装: 1
系列: PHYceiver™
类型: PHY 收发器
规程: MII
电源电压: 3.14 V ~ 3.47 V
安装类型: 表面贴装
封装/外壳: 48-BSSOP(0.295",7.50mm 宽)
供应商设备封装: 48-SSOP
包装: 标准包装
产品目录页面: 1252 (CN2011-ZH PDF)
其它名称: 800-1017-6
ICS1893BF, Rev. F, 5/13/10
May, 2010
78
Chapter 7 Management Register Set
ICS1893BF Data Sheet - Release
Copyright 2009, IDT, Inc.
All rights reserved.
7.11.7 Invalid Error Code Test (bit 16.2)
The Invalid Error Code Test bit allows an STA to force the ICS1893BF to transmit symbols that are typically
classified as invalid. The purpose of this test bit is to permit thorough testing of the 4B/5B encoding and the
serial transmit data stream by allowing generation of bit patterns that are considered invalid by the ISO/IEC
4B/5B definition.
When this bit is logic:
Zero, the ISO/IEC defined 4B/5B translation takes place.
One – and the TXER signal is asserted by the MAC – the MII input nibbles are translated according to
7.11.8 ICS Reserved (bit 16.1)
See Section 7.11.2, “ICS Reserved (bits 16.14:11)”, the text for which also applies here.
7.11.9 Stream Cipher Disable (bit 16.0)
The Stream Cipher Disable bit allows an STA to control whether the ICS1893BF employs the Stream
Cipher Scrambler in the transmit and receive data paths. When this bit is set to logic:
Zero, the Stream Cipher Encoder and Decoder are both enabled for normal operations.
One, the Stream Cipher Encoder and Decoder are disabled. This action results in an unscrambled data
stream (for example, the ICS1893BF transmits unscrambled IDLES, and so forth.
Note: The Stream Cipher Scrambler can be used only for 100-MHz operations.
Table 7-17. Invalid Error Code Translation Table
Symbol
Meaning
MII Input
Nibble
Translation
V
Invalid Code
0000
00000
V
Invalid Code
0001
00001
V
Invalid Code
0010
00010
V
Invalid Code
0011
00011
H
Error
0100
00100
V
Invalid Code
0101
00101
V
Invalid Code
0110
00110
R
ESD
0111
00111
V
Invalid Code
1000
00000
T
ESD
1001
01101
V
Invalid Code
1010
01100
K
SSD
1011
10001
V
Invalid Code
1100
10000
V (S)
Invalid Code
1101
11001
J
SSD
1110
11000
I
Idle
1111
11111
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