参数资料
型号: ICS1893BKLF
厂商: IDT, Integrated Device Technology Inc
文件页数: 79/133页
文件大小: 0K
描述: PHYCEIVER LOW PWR 3.3V 56-VQFN
标准包装: 260
系列: PHYceiver™
类型: PHY 收发器
规程: MII
电源电压: 3.14 V ~ 3.47 V
安装类型: 表面贴装
封装/外壳: 56-VFQFN 裸露焊盘
供应商设备封装: 56-VFQFP-EP(8x8)
包装: 管件
其它名称: 1893BKLF
800-1019
Table of Contents
ICS1893BF, Rev. F, 5/13/10
May, 2010
5
ICS1893BF Data Sheet Rev. F - Release
Copyright 2009, IDT, Inc.
All rights reserved.
Table of Contents
Section
Title
Page
7.5.1
OUI bits 19-24 (bits 3.15:10) ..................................................................................63
7.5.2
Manufacturer's Model Number (bits 3.9:4) .............................................................63
7.5.3
Revision Number (bits 3.3:0) .................................................................................63
7.6
Register 4: Auto-Negotiation Register ...................................................................65
7.6.1
Next Page (bit 4.15) ...............................................................................................65
7.6.2
IEEE Reserved Bit (bit 4.14) ..................................................................................66
7.6.3
Remote Fault (bit 4.13) ..........................................................................................66
7.6.4
IEEE Reserved Bits (bits 4.12:10) .........................................................................66
7.6.5
Technology Ability Field (bits 4.9:5) .......................................................................67
7.6.6
Selector Field (Bits 4.4:0) .......................................................................................67
7.7
Register 5: Auto-Negotiation Link Partner Ability Register ....................................68
7.7.1
Next Page (bit 5.15) ...............................................................................................68
7.7.2
Acknowledge (bit 5.14) ..........................................................................................69
7.7.3
Remote Fault (bit 5.13) ..........................................................................................69
7.7.4
Technology Ability Field (bits 5.12:5) .....................................................................69
7.7.5
Selector Field (bits 5.4:0) .......................................................................................69
7.8
Register 6: Auto-Negotiation Expansion Register ..................................................70
7.8.1
IEEE Reserved Bits (bits 6.15:5) ...........................................................................70
7.8.2
Parallel Detection Fault (bit 6.4) .............................................................................71
7.8.3
Link Partner Next Page Able (bit 6.3) ....................................................................71
7.8.4
Next Page Able (bit 6.2) .........................................................................................71
7.8.5
Page Received (bit 6.1) .........................................................................................71
7.8.6
Link Partner Auto-Negotiation Able (bit 6.0) ..........................................................71
7.9
Register 7: Auto-Negotiation Next Page Transmit Register ...................................72
7.9.1
Next Page (bit 7.15) ...............................................................................................73
7.9.2
IEEE Reserved Bit (bit 7.14) ..................................................................................73
7.9.3
Message Page (bit 7.13) ........................................................................................73
7.9.4
Acknowledge 2 (bit 7.12) .......................................................................................73
7.9.5
Toggle (bit 7.11) .....................................................................................................73
7.9.6
Message Code Field / Unformatted Code Field (bits 7.10:0) .................................73
7.10
Register 8: Auto-Negotiation Next Page Link Partner Ability Register ...................74
7.10.1
Next Page (bit 8.15) ...............................................................................................75
7.10.2
IEEE Reserved Bit (bit 8.14) ..................................................................................75
7.10.3
Message Page (bit 8.13) ........................................................................................75
7.10.4
Acknowledge 2 (bit 8.12) .......................................................................................75
7.10.5
Message Code Field / Unformatted Code Field (bits 8.10:0) .................................75
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ICS1893BKLFT 功能描述:PHYCEIVER LOW PWR 3.3V 56-VQFN RoHS:是 类别:集成电路 (IC) >> 接口 - 驱动器,接收器,收发器 系列:PHYceiver™ 标准包装:250 系列:- 类型:收发器 驱动器/接收器数:2/2 规程:RS232 电源电压:3 V ~ 5.5 V 安装类型:表面贴装 封装/外壳:16-TSSOP(0.173",4.40mm 宽) 供应商设备封装:16-TSSOP 包装:带卷 (TR)
ICS1893BKT 功能描述:PHYCEIVER LOW PWR 3.3V 56-VQFN RoHS:否 类别:集成电路 (IC) >> 接口 - 驱动器,接收器,收发器 系列:PHYceiver™ 标准包装:250 系列:- 类型:收发器 驱动器/接收器数:2/2 规程:RS232 电源电压:3 V ~ 5.5 V 安装类型:表面贴装 封装/外壳:16-TSSOP(0.173",4.40mm 宽) 供应商设备封装:16-TSSOP 包装:带卷 (TR)
ICS1893BRIEF 制造商:ICS 制造商全称:ICS 功能描述:3.3-V 10Base-T/100Base-TX Integrated PHYceiver
ICS1893BY-10 功能描述:PHYCEIVER LOW PWR 3.3V 64-TQFP RoHS:否 类别:集成电路 (IC) >> 接口 - 驱动器,接收器,收发器 系列:PHYceiver™ 标准包装:1,000 系列:- 类型:收发器 驱动器/接收器数:2/2 规程:RS232 电源电压:3 V ~ 5.5 V 安装类型:表面贴装 封装/外壳:16-SOIC(0.295",7.50mm 宽) 供应商设备封装:16-SOIC 包装:带卷 (TR)
ICS1893BY-10LF 功能描述:PHYCEIVER LOW PWR 3.3V 64-TQFP RoHS:是 类别:集成电路 (IC) >> 接口 - 驱动器,接收器,收发器 系列:PHYceiver™ 标准包装:250 系列:- 类型:收发器 驱动器/接收器数:2/2 规程:RS232 电源电压:3 V ~ 5.5 V 安装类型:表面贴装 封装/外壳:16-TSSOP(0.173",4.40mm 宽) 供应商设备封装:16-TSSOP 包装:带卷 (TR)