参数资料
型号: ICS426GLFT
厂商: INTEGRATED DEVICE TECHNOLOGY INC
元件分类: 时钟产生/分配
英文描述: 156.25 MHz, OTHER CLOCK GENERATOR, PDSO16
封装: 0.173 INCH, TSSOP-16
文件页数: 2/6页
文件大小: 84K
代理商: ICS426GLFT
Serial ATA/Fibre Channel Clock Synthesizer
MDS 426 B
2
Revision 091102
Integrated Circuit Systems, Inc. q 525 Race Street, San Jose, CA 95126 q tel (408) 295-9800 q
www.icst.com
ICS426
Pin Assignment
Clock Output Select Table (MHz)
Pin Descriptions
12
1
11
2
10
3
9
X1/ICLK
4
VDD
5
VDD
6
GND
7
GND
8
GND
OE
GND
S1
S0
GND
VDD
16
15
14
13
CLK
X2
16 pin 173 mil (0.65 mm) TSSOP
S1
S0
Input
CLK Output
0
25
75
0
1
25
150
1
0
25
106.25
1
25
156.25
Pin
Number
Pin
Name
Pin
Type
Pin Description
1
X1/ICLK
XI
Crystal connection. Connect to a 25 MHz fundamental mode
crystal or clock input.
2
VDD
Power
Connect to +3.3 V.
3
VDD
Power
Connect to +3.3 V.
4
GND
Power
Connect to ground.
5
GND
Power
Connect to ground.
6
S1
Input
Select pin 1 determines CLK output based on table above. Internal
pull-up.
7
VDD
Power
Connect to +3.3 V.
8
CLK
Output
Clock output. Tri-state output when OE is low.
9
GND
Power
Connect to ground.
10
VDD
Power
Connect to +3.3V.
11
S0
Input
Select pin 0 determines CLK output based on table above. Internal
pull-up.
12
GND
Power
Connect to ground.
13
OE
Input
Output Enable. All outputs are tri-stated when low. Internal pull-up.
14
GND
Power
Connect to ground.
15
GND
Power
Connect to ground.
16
X2
XO
Crystal connection. Connect to a 25 MHz fundamental mode
crystal or float for clock input.
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