参数资料
型号: ICS548G-05T
厂商: IDT, Integrated Device Technology Inc
文件页数: 1/7页
文件大小: 0K
描述: IC CLOCK MULT T1/E1 16-TSSOP
产品变化通告: Product Discontinuation 13/May/2009
标准包装: 2,500
类型: 时钟/频率合成器,扇出缓冲器(分配)
PLL: 带旁路
输入: 时钟,晶体
输出: CMOS
电路数: 1
比率 - 输入:输出: 1:12
差分 - 输入:输出: 无/无
频率 - 最大: 49.152MHz
除法器/乘法器: 无/是
电源电压: 3.15 V ~ 5.5 V
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 16-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 16-TSSOP
包装: 带卷 (TR)
其它名称: 548G-05T
DATASHEET
T1/E1 CLOCK MULTIPLIER
ICS548-05
IDT T1/E1 CLOCK MULTIPLIER
1
ICS548-05
REV D 091511
Description
The ICS548-05 is a low-cost, low-jitter,
high-performace clock synthesizer designed to
produce x16 and x24 clocks from T1 and E1
frequencies. Using IDT’s patented analog/digital
Phase- Locked Loop (PLL) techniques, the device uses
a crystal or clock input to synthesize popular
communications frequencies. Power down modes allow
the chip to turn off completely, or the PLL and clock
output to be turned off separately.
IDT manuafactures the largest variety of
communications clock synthesizers for all applications.
Consult IDT to eliminate VCXO’s, crystals, and
oscillators from your board.
Features
Packaged in 16-pin TSSOP
Available in Pb (lead) free package
Ideal for telecom/datacom chips
Replaces oscillators
3.3 V or 5 V operation
Uses a crystal or clock input
Produces 24.704, 37.056, 32.768, or 49.152 MHz
Includes Power-down features
Advanced, low-power, sub-micron CMOS process
See also the MK2049-34 for generating
Industrial temperature range available
Block Diagram
X1/ICLK
X2
Input
Buffer/
Crystal
Oscillator
1.544 MHz or
2.048 MHz
clock or crystal
input
Optional crystal
capacitors
CLK
REFOUT
MSEL
X16 or x24
PLL/Clock
Synthesis
Circuitry
REFEN
PDCLK
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