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| 型号： | ICS85108AGILFT |
| 厂商： | IDT, Integrated Device Technology Inc |
| 文件页数： | 9/16页 |
| 文件大小： | 0K |
| 描述： | IC CLK BUFFER 1:8 500MHZ 24TSSOP |
| 标准包装： | 1,000 |
| 系列： | HiPerClockS™ |
| 类型： | 扇出缓冲器（分配） |
| 电路数： | 1 |
| 比率 - 输入:输出： | 1:8 |
| 差分 - 输入:输出： | 是/是 |
| 输入： | HCSL，LVDS，LVHSTL，LVPECL，SSTL |
| 输出： | HCSL |
| 频率 - 最大： | 500MHz |
| 电源电压： | 2.97 V ~ 3.63 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 24-TSSOP |
| 包装： | 带卷 (TR) |
ICS85108I Data Sheet
LOW SKEW, 1-TO-8, DIFFERENTIAL-TO-0.7V HCSL CLOCK DISTRIBUTION CHIP
ICS85108AGI REVISION A OCTOBER 23, 2009
2
2009 Integrated Device Technology, Inc.
Table 1. Pin Descriptions
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
Table 2. Pin Characteristics
Function Tables
Table 3. Clock Input Function Table
NOTE 1: Please refer to the Application Information section Wiring the Differential Input to Accept Single Ended Levels.
Number
Name
Type
Description
1, 2
Q0, nQ0
Output
Differential output pair. HCSL interface levels.
3, 16, 21
VDD
Power
Power supply pins.
4
CLK
Input
Pulldown
Non-inverting differential clock input.
5
nCLK
Input
Pullup/
Pulldown
Inverting differential clock input.
6, 7
Q1, nQ1
Output
Differential output pair. HCSL interface levels.
8, 9
Q2, nQ2
Output
Differential output pair. HCSL interface levels.
10
IREF
External fixed precision resistor (475
) from this pin to ground provides a reference
current used for differential current-mode Qx/nQx clock outputs.
11, 12
Q3, nQ3
Output
Differential output pair. HCSL interface levels.
13, 14
nQ4, Q4
Output
Differential output pair. HCSL interface levels.
15, 22
GND
Power
Power supply ground.
17, 18
nQ5, Q5
Output
Differential output pair. HCSL interface levels.
19, 20
nQ6, Q6
Output
Differential output pair. HCSL interface levels.
23, 24
nQ7, Q7
Output
Differential output pair. HCSL interface levels.
Symbol
Parameter
Test Conditions
Minimum
Typical
Maximum
Units
CIN
Input Capacitance
4pF
RPULLUP
Input Pullup Resistors
51
k
RPULLDOWN
Input Pulldown Resistors
51
k
Inputs
Outputs
Input to Output Mode
Polarity
CLK
nCLK
Q[0:7]
n[0:7]
0
1
LOW
HIGH
Differential to Differential
Non-Inverting
1
0
HIGH
LOW
Differential to Differential
Non-Inverting
0
Biased; NOTE 1
LOW
HIGH
Single-Ended to Differential
Non-Inverting
1
Biased; NOTE 1
HIGH
LOW
Single-Ended to Differential
Non-Inverting
Biased; NOTE 1
0
HIGH
LOW
Single-Ended to Differential
Inverting
Biased; NOTE 1
1
LOW
HIGH
Single-Ended to Differential
Inverting
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