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参数资料
| 型号： | ICS86004BGI |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟及定时 |
| 英文描述： | 86004 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 |
| 封装： | 4.40 X 5 MM, 0.925 MM HEIGHT, MO-153, TSSOP-16 |
| 文件页数： | 1/12页 |
| 文件大小： | 2382K |
| 代理商： | ICS86004BGI |
15.625MHZ TO 62.5MHZ, 1:4 LVCMOS/
LVTTL ZERO DELAY CLOCK BUFFER
ICS86004I
IDT / ICS LVCMOS ZERO DELAY CLOCK BUFFER
1
ICS86004I REV A JULY 7, 2006
GENERAL DESCRIPTION
The ICS86004I is a high perfo r mance 1:4
LVCMOS/LVTTL Clock Buffer and a member of
the HiPerClockS family of High Performance
Clock Solutions from I
DT. The ICS86004I has a
fully integrated PLL and can be configured as zero
delay buffer and has an input and output frequency range of
15.625MHz to 62.5MHz. The VCO operates at a frequency
range of 250MHz to 500MHz. The external feedback allows the
device to achieve “zero delay” between the input clock and the
output clocks. The PLL_SEL pin can be used to bypass the
PLL for system test and debug purposes. In bypass mode, the
reference clock is routed around the PLL and into the internal
output divider.
FEATURES
Four LVCMOS/LVTTL outputs, 7
typical output impedance
Single LVCMOS/LVTTL clock input
CLK accepts the following input levels: LVCMOS or LVTTL
Output frequency range: 15.625MHz to 62.5MHz
Input frequency range: 15.625MHz to 62.5MHz
VCO range: 250MHz to 500MHz
External feedback for “zero delay” clock regeneration
with configurable frequencies
Fully integrated PLL
Cycle-to-cycle jitter:
75ps (maximum)
Output skew: 65ps (maximum)
Full 3.3V or 2.5V, or 3.3V core/2.5V output operating supply
-40°C to 85° ambient operating temperature
Available in both standard and lead-free RoHS compliant
packages
HiPerClockS
ICS
BLOCK DIAGRAM
PIN ASSIGNMENT
PLL_SEL
CLK
FB_IN
MR
F_SEL
Q0
Q1
Q2
Q3
PLL
1:1
÷8, ÷16
0
1
Q1
GND
Q0
F_SEL
VDD
CLK
GND
VDDA
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
VDDO
Q2
GND
Q3
VDDO
MR
FB_IN
PLL_SEL
ICS86004I
16-Lead TSSOP
4.4mm x 5.0mm x 0.925mm package body
G Package
Top View
相关PDF资料 |
PDF描述 |
|---|---|
| ICS86004BGLFT | 86004 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 |
| ICS86004BG | 86004 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 |
| ICS86004G-01 | 86004 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 |
| ICS8624BYI | PLL BASED CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32 |
| ICS8624BYILF | PLL BASED CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS86004BGILF | 功能描述:IC CLK BUFFER ZD 1:4 16-TSSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:HiPerClockS™ 标准包装:1,000 系列:- 类型:时钟/频率合成器，扇出分配 PLL:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 除法器/乘法器:- 电源电压:- 工作温度:- 安装类型:表面贴装 封装/外壳:56-VFQFN 裸露焊盘 供应商设备封装:56-VFQFP-EP（8x8） 包装:带卷 (TR) 其它名称:844S012AKI-01LFT |
| ICS86004BGILFT | 功能描述:IC CLK BUFFER ZD 1:4 16-TSSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:HiPerClockS™ 标准包装:1,000 系列:- 类型:时钟/频率合成器，扇出分配 PLL:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 除法器/乘法器:- 电源电压:- 工作温度:- 安装类型:表面贴装 封装/外壳:56-VFQFN 裸露焊盘 供应商设备封装:56-VFQFP-EP（8x8） 包装:带卷 (TR) 其它名称:844S012AKI-01LFT |
| ICS86004BGLF | 功能描述:IC CLK BUFFER ZD 1:4 16-TSSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:HiPerClockS™ 标准包装:1,000 系列:- 类型:时钟/频率合成器，扇出分配 PLL:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 除法器/乘法器:- 电源电压:- 工作温度:- 安装类型:表面贴装 封装/外壳:56-VFQFN 裸露焊盘 供应商设备封装:56-VFQFP-EP（8x8） 包装:带卷 (TR) 其它名称:844S012AKI-01LFT |
| ICS86004BGLFT | 功能描述:IC CLK BUFFER ZD 1:4 16-TSSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:HiPerClockS™ 标准包装:1,000 系列:- 类型:时钟/频率合成器，扇出分配 PLL:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 除法器/乘法器:- 电源电压:- 工作温度:- 安装类型:表面贴装 封装/外壳:56-VFQFN 裸露焊盘 供应商设备封装:56-VFQFP-EP（8x8） 包装:带卷 (TR) 其它名称:844S012AKI-01LFT |
| ICS8602AY | 制造商:ICS 功能描述: |
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