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| 型号： | ICS87016AYIT |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟及定时 |
| 英文描述： | 87016 SERIES, LOW SKEW CLOCK DRIVER, 16 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP48 |
| 封装： | 7 X 7 MM, 1.40 MM HEIGHT, MS-026ABC-HD, LQFP-48 |
| 文件页数： | 1/17页 |
| 文件大小： | 1191K |
| 代理商： | ICS87016AYIT |
LOW SKEW, 1-TO-16 LVCMOS/LVTTL
CLOCK GENERATOR
ICS87016I
IDT / ICS LVCMOS/LVTTL CLOCK GENERATOR
1
ICS87016AYI REV. B
MARCH 30, 2007
Description
The ICS87016I is a low skew, 1:16 LVCMOS/LVTTL
Clock Generator and is a member of the
HiPerClockS family of High Performance Clock
Solutions. The device has 4 banks of 4 outputs and
each bank can be independently selected for
÷1 or
÷2 frequency operation. Each bank also has its own power supply
pins so that the banks can operate at the following different
voltage levels: 3.3V, 2.5V, and 1.8V. The low impedance
LVCMOS/LVTTL outputs are designed to drive 50
series or
parallel terminated transmission lines.
The divide select inputs, DIV_SELA:DIV_SELD, control the output
frequency of each bank. The output banks can be independently
selected for
÷1 or ÷2 operation. The bank enable inputs,
CLK_ENA:CLK_END, support enabling and disabling each bank
of outputs individually. The CLK_ENA:CLK_END circuitry has a
synchronizer to prevent runt pulses when enabling or disabling the
clock outputs. The master reset input, MR/OE, resets the
÷1/÷2
flip flops and also controls the active and high impedance states of
all outputs. This pin has an internal pull-up resistor and is normally
used only for test purposes or in systems which use low power
modes.
The ICS87016I is characterized to operate with the core at 3.3V or
2.5V and the banks at 3.3V, 2.5V, or 1.8V. Guaranteed bank,
output, and part-to-part skew characteristics make the 87016I
ideal for those clock applications demanding well-defined
performance and repeatability.
Features
Sixteen LVCMOS/LVTTL outputs (4 banks of 4 outputs)
Selectable differential CLK1/CLK1 or LVCMOS/LVTTL clock
input
CLK1, CLK1 pair can accept the following differential
input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL
CLK0 supports the following input types: LVCMOS, LVTTL
Maximum output frequency: 250MHz
Independent bank control for ÷1 or ÷2 operation
Independent output bank voltage settings for 3.3V, 2.5V, or 1.8V
operation
Asynchronous clock enable/disable
Output skew: 170ps (maximum)
Bank skew: 50ps (maximum
Part-to-Part Skew: 800ps (maximum)
Supply modes:
Core/Output
3.3V/3.3V
3.3V/2.5V
3.3V/1.8V
2.5V/2.5V
2.5V/1.8V
-40°C to 85°C ambient operating temperature
Available in both standard (RoHS 5) and lead-free (RoHS 6)
packages
HiPerClockS
ICS
ICS87016I
48-Lead LQFP
7mm x 7mm x 1.4mm package body
Y Package
Top View
13 14 15 16 17 18 19 20 21 22 23 24
1
2
3
4
5
6
7
8
9
10
11
12
36
35
34
33
32
31
30
29
28
27
26
25
VDD
CLK0
DIV_SELA
DIV_SELB
DIV_SELC
DIV_SELD
CLK_ENA
CLK_ENB
CLK_ENC
CLK_END
MR/OE
GND
QB0
VDDOB
QB1
GND
QB2
VDDOB
QB3
GND
QC0
VDDOC
QC1
QD3
V
DDOD
QD2
GND
QD1
V
DDOD
QD0
GND
QC3
V
DDOC
QC2
GND
CLK1
CLK_SEL
GND
QA0
V
DDOA
QA1
GND
QA2
V
DDOA
QA3
V
DD
48 47 46 45 44 43 42 41 40 39 38 37
Pin Assignment
MR/OE
CLK0
CLK1
CLK_SEL
DIV_SELA
DIV_SELB
DIV_SELC
DIV_SELD
CLK_ENA
CLK_ENB
CLK_ENC
CLK_END
QA0:QA3
QB0:QB3
QC0:QC3
QD0:QD3
0
1
0
1
0
1
0
1
0
÷1
÷2
4
LE
D
Block Diagram
相关PDF资料 |
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| ICS87016AYI | LOW SKEW CLOCK DRIVER, 16 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP48 |
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| ICS87016AY | 87016 SERIES, LOW SKEW CLOCK DRIVER, 16 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), QCC16 |
| ICS87016AYT | 87016 SERIES, LOW SKEW CLOCK DRIVER, 16 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), QCC16 |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS87016AYLF | 功能描述:IC CLK GENERATOR 1:6 48-LQFP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:HiPerClockS™ 标准包装:2,000 系列:- 类型:PLL 频率合成器 PLL:是 输入:晶体 输出:时钟 电路数:1 比率 - 输入:输出:1:1 差分 - 输入:输出:无/无 频率 - 最大:1GHz 除法器/乘法器:是/无 电源电压:4.5 V ~ 5.5 V 工作温度:-20°C ~ 85°C 安装类型:表面贴装 封装/外壳:16-LSSOP（0.175"，4.40mm 宽） 供应商设备封装:16-SSOP 包装:带卷 (TR) 其它名称:NJW1504V-TE1-NDNJW1504V-TE1TR |
| ICS87016AYLF/W | 制造商:Integrated Device Technology Inc 功能描述:IC CLOCK GENERATOR 48LQFP 制造商:Integrated Device Technology Inc 功能描述:IC CLK GENERATOR 1:6 48-LQFP |
| ICS87016AYLFT | 功能描述:IC CLOCK GENERATOR 1-16 48-LQFP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:HiPerClockS™ 标准包装:1,000 系列:- 类型:时钟/频率合成器，扇出分配 PLL:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 除法器/乘法器:- 电源电压:- 工作温度:- 安装类型:表面贴装 封装/外壳:56-VFQFN 裸露焊盘 供应商设备封装:56-VFQFP-EP（8x8） 包装:带卷 (TR) 其它名称:844S012AKI-01LFT |
| ICS8701AY-01LF | 功能描述:IC CLK GEN POLARITY CTRL 48-LQFP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:HiPerClockS™ 标准包装:1,000 系列:- 类型:时钟/频率合成器，扇出分配 PLL:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 除法器/乘法器:- 电源电压:- 工作温度:- 安装类型:表面贴装 封装/外壳:56-VFQFN 裸露焊盘 供应商设备封装:56-VFQFP-EP（8x8） 包装:带卷 (TR) 其它名称:844S012AKI-01LFT |
| ICS8701AY-01LFT | 功能描述:IC CLK GEN POLARITY CTRL 48-LQFP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:HiPerClockS™ 标准包装:1,000 系列:- 类型:时钟/频率合成器，扇出分配 PLL:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 除法器/乘法器:- 电源电压:- 工作温度:- 安装类型:表面贴装 封装/外壳:56-VFQFN 裸露焊盘 供应商设备封装:56-VFQFP-EP（8x8） 包装:带卷 (TR) 其它名称:844S012AKI-01LFT |
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