- 您现在的位置：买卖IC网 > PDF目录67700 > ICS87016AYT 87016 SERIES, LOW SKEW CLOCK DRIVER, 16 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), QCC16 PDF资料下载
参数资料
| 型号： | ICS87016AYT |
| 元件分类： | 时钟及定时 |
| 英文描述： | 87016 SERIES, LOW SKEW CLOCK DRIVER, 16 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), QCC16 |
| 封装： | 7 X 7 MM, 1.40 MM HEIGHT, MS-026, LQFP-48 |
| 文件页数： | 1/16页 |
| 文件大小： | 229K |
| 代理商： | ICS87016AYT |
Integrated
Circuit
Systems, Inc.
87016AY
www.icst.com/products/hiperclocks.html
REV. A FEBRUARY 28, 2006
1
ICS87016
LOW SKEW, 1-TO-16
LVCMOS/LVTTL CLOCK GENERATOR
GENERAL DESCRIPTION
The ICS87016 is a low skew, 1:16 LVCMOS/
LVTTL Clock Generator and is a member of the
HiPerClockSfamily of High Performance Clock
Solutions. The device has 4 banks of 4 outputs
and each bank can be independently selected for
÷1 or ÷2 frequency operation. Each bank also has its own power
supply pins so that the banks can operate at the following dif-
ferent voltage levels: 3.3V, 2.5V, and 1.8V. The low impedance
LVCMOS/LVTTL outputs are designed to drive 50
Ω series or
parallel terminated transmission lines.
The divide select inputs, DIV_SELA:DIV_SELD, control the
output frequency of each bank. The output banks can be
independently selected for
÷1 or ÷2 operation.The bank enable
inputs, CLK_ENA:CLK_END, support enabling and disabling
each bank of outputs individually. The CLK_ENA:CLK_END
circuitry has a synchronizer to prevent runt pulses when
enabling or disabling the clock outputs. The master reset
input, nMR/OE, resets the
÷1/÷2 flip flops and also controls the
active and high impedance states of all outputs. This pin has
an internal pull-up resistor and is normally used only for test
purposes or in systems which use low power modes.
The ICS87016 is characterized to operate with the core at
3.3V and the banks at 3.3V, 2.5V, or 1.8V. Guaranteed bank,
output, and part-to-part skew characteristics make the
87016 ideal for those clock applications demanding well-
defined performance and repeatability.
FEATURES
Sixteen LVCMOS/LVTTL outputs (4 banks of 4 outputs)
Selectable differential CLK1, nCLK1 or
LVCMOS clock input
CLK1, nCLK1 pair can accept the following differential
input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL
CLK0 supports the following input types:
LVCMOS, LVTTL
Maximum output frequency: 250MHz
Independent bank control for
÷1 or ÷2 operation
Independent output bank voltage settings for 3.3V, 2.5V,
or 1.8V operation
Asynchronous clock enable/disable
Output skew: 170ps (maximum)
Bank skew: 30ps (maximum)
Part-to-part skew: 750ps (maximum)
3.3V core, 3.3V, 2.5V, or 1.8V output operating supply
0°C to 85°C ambient operating temperature
Available in both standard and lead-free RoHS compliant
packages
BLOCK DIAGRAM
PIN ASSIGNMENT
HiPerClockS
ICS
48-Pin LQFP
7mm x 7mm x 1.4mm body package
Y Package
Top View
GND
QC2
V
DDOC
QC3
GND
QD0
V
DDOD
QD1
GND
QD2
V
DDOD
QD3
48 47 46 45 44 43 42 41 40 39 38 37
13 14 15 16 17 18 19 20 21 22 23 24
1
2
3
4
5
6
7
8
9
10
11
12
36
35
34
33
32
31
30
29
28
27
26
25
VDD
CLK0
DIV_SELA
DIV_SELB
DIV_SELC
DIV_SELD
CLK_ENA
CLK_ENB
CLK_ENC
CLK_END
nMR/OE
GND
QB0
VDDOB
QB1
GND
QB2
VDDOB
QB3
GND
QC0
VDDOC
QC1
QA3
V
DDOA
QA2
GND
QA1
V
DDOA
QA0
GND
CLK_SEL
nCLK1
CLK1
V
DD
ICS87016
nMR/OE
CLK0
CLK1
nCLK1
CLK_SEL
DIV_SELA
DIV_SELB
DIV_SELC
DIV_SELD
CLK_ENA
CLK_ENB
CLK_ENC
CLK_END
QA0:QA3
QB0:QB3
QC0:QC3
QD0:QD3
0
1
0
1
0
1
0
1
0
÷1
÷2
4
LE
D
相关PDF资料 |
PDF描述 |
|---|---|
| ICS8701CYI | 8701 SERIES, LOW SKEW CLOCK DRIVER, 20 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP48 |
| ICS8701CYIT | 8701 SERIES, LOW SKEW CLOCK DRIVER, 20 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP48 |
| ICS8701CYIT | 8701 SERIES, LOW SKEW CLOCK DRIVER, 20 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP48 |
| ICS8701CYLF | 8701 SERIES, LOW SKEW CLOCK DRIVER, 20 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP48 |
| ICS8701CYLFT | 8701 SERIES, LOW SKEW CLOCK DRIVER, 20 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP48 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS8701AY-01LF | 功能描述:IC CLK GEN POLARITY CTRL 48-LQFP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:HiPerClockS™ 标准包装:1,000 系列:- 类型:时钟/频率合成器，扇出分配 PLL:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 除法器/乘法器:- 电源电压:- 工作温度:- 安装类型:表面贴装 封装/外壳:56-VFQFN 裸露焊盘 供应商设备封装:56-VFQFP-EP（8x8） 包装:带卷 (TR) 其它名称:844S012AKI-01LFT |
| ICS8701AY-01LFT | 功能描述:IC CLK GEN POLARITY CTRL 48-LQFP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:HiPerClockS™ 标准包装:1,000 系列:- 类型:时钟/频率合成器，扇出分配 PLL:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 除法器/乘法器:- 电源电压:- 工作温度:- 安装类型:表面贴装 封装/外壳:56-VFQFN 裸露焊盘 供应商设备封装:56-VFQFP-EP（8x8） 包装:带卷 (TR) 其它名称:844S012AKI-01LFT |
| ICS8701CY | 制造商:ICS 功能描述: |
| ICS8701CYILF | 功能描述:IC CLOCK GENERATOR 48-LQFP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:HiPerClockS™ 标准包装:1,000 系列:- 类型:时钟/频率合成器，扇出分配 PLL:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 除法器/乘法器:- 电源电压:- 工作温度:- 安装类型:表面贴装 封装/外壳:56-VFQFN 裸露焊盘 供应商设备封装:56-VFQFP-EP（8x8） 包装:带卷 (TR) 其它名称:844S012AKI-01LFT |
| ICS8701CYILFT | 功能描述:IC CLOCK GENERATOR 48-LQFP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:HiPerClockS™ 标准包装:1,000 系列:- 类型:时钟/频率合成器，扇出分配 PLL:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 除法器/乘法器:- 电源电压:- 工作温度:- 安装类型:表面贴装 封装/外壳:56-VFQFN 裸露焊盘 供应商设备封装:56-VFQFP-EP（8x8） 包装:带卷 (TR) 其它名称:844S012AKI-01LFT |
发布紧急采购，3分钟左右您将得到回复。