参数资料
型号: ICS870931ARI-01LF
厂商: IDT, Integrated Device Technology Inc
文件页数: 13/13页
文件大小: 0K
描述: IC CLK GENERATOR LVCMOS 20QSOP
标准包装: 55
系列: HiPerClockS™
类型: *
PLL: 带旁路
输入: LVCMOS,LVTTL
输出: LVCMOS,LVTTL
电路数: 1
比率 - 输入:输出: 1:6
差分 - 输入:输出: 无/无
频率 - 最大: 80MHz
除法器/乘法器: 是/是
电源电压: 3 V ~ 3.6 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 20-SSOP(0.154",3.90mm 宽)
供应商设备封装: 20-QSOP
包装: 管件
ICS870931ARI-01 REVISION A JUNE 11, 2009
9
2009 Integrated Device Technology, Inc.
ICS870931I-01 Data Sheet
LVCMOS CLOCK GENERATOR
Power Considerations
This section provides information on power dissipation and junction temperature for the ICS870931I-01.
Equations and example calculations are also provided.
1.
Power Dissipation.
The total power dissipation for the ICS870931I-01 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for VDD = 3.3V + 0.3V = 3.6V, which gives worst case results.
Power (core)MAX = VDD_MAX * IDD_MAX= 3.6V *5mA = 18mW
Output Impedance ROUT Power Dissipation due to Loading 50 to VDD/2
Output Current IOUT = VDD_MAX / [2 * (50 + ROUT)] = 3.6V / [2 * (50 + 11)] = 29.5mA
Power Dissipation on the ROUT per LVCMOS output
Power (ROUT) = ROUT * (IOUT)
2 = 11
* (29.5mA)2 = 9.57mW per output
Total Power (ROUT) = ROUT (per output) * number of outputs = 9.57mW * 6 outputs = 57.42mW
Dynamic Power Dissipation at 80MHz
Power (80MHz) = CPD * Frequency * (VDD)
2 = 330pF * 80MHz * (3.6V)2 = 342mW
Total Power
= Power (core)MAX + Total Power (ROUT) + Power (80MHz)
= 18mW + 57.42mW + 342mW
= 417.42mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the device. The
maximum recommended junction temperature for HiPerClockS devices is 125°C.
The equation for Tj is as follows: Tj =
θ
JA * Pd_total + TA
Tj = Junction Temperature
θ
JA = Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
TA = Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance
θ
JA must be used. Assuming no air flow and
a multi-layer board, the appropriate value is 72.3°C/W per Table 6 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
85°C + 0.417W * 72.3°C/W = 115.1°C. This is well below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type of
board (multi-layer).
Table 6. Thermal Resistance θJA for a 20 Lead QSOP, Forced Convection
θ
JA by Velocity
Linear Feet per Minute
0200
500
Multi-Layer PCB, JEDEC Standard Test Boards
72.3°C/W
64.4°C/W
61.0°C/W
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