参数资料
型号: ICS8741004BGILFT
厂商: INTEGRATED DEVICE TECHNOLOGY INC
元件分类: 时钟及定时
英文描述: 8741004 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO24
封装: 4.40 X 7.80 MM, 0.925 MM HEIGHT, ROHS COMPLIANT, TSSOP-24
文件页数: 7/20页
文件大小: 1988K
代理商: ICS8741004BGILFT
ICS8741004I
DIFFERENTIAL-TO-LVDS/0.7V DIFFERENTIAL PCI EXPRESS JITTER ATTENUATOR
PRELIMINARY
IDT / ICS PCI EXPRESS JITTER ATTENUATOR
15
ICS8741004BGI REV. B SEPTEMBER 27, 2007
Power Considerations
This section provides information on power dissipation and junction temperature for the ICS8741004I.
Equations and example calculations are also provided.
1.
Power Dissipation.
The total power dissipation for the ICS741004I is the sum of the core power plus the analog power plus the power dissipated in the load(s).
The following is the power dissipation for VDD = 3.3V + 5% = 3.465V, which gives worst case results.
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
Power (core)MAX = VDD_MAX * (IDD_MAX + IDDA_MAX) = 3.465V * (45mA + 12mA) = 197.5mW
Power (LVDS_output)MAX = VDDO_MAX * IDDO_MAX = 3.465V * 80mA = 227.2mW
Power (HCSL_output)MAX = 45.65mW * 2 = 91.3mW
Total Power_MAX = (3.465V, with all outputs switching) = 197.5mW + 277.2mW + 91.3mW = 556mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the device.
The maximum recommended junction temperature for HiPerClockS devices is 125°C.
The equation for Tj is as follows: Tj =
θ
JA * Pd_total + TA
Tj = Junction Temperature
θ
JA = Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
TA = Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance
θ
JA must be used. Assuming no air flow
and a multi-layer board, the appropriate value is 32.1°C/W per Table 6 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
85°C + 0.556W * 32.1°C/W = 102.8°C. This is below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type
of board (single layer or multi-layer).
Table 6. Thermal Resistance θJA for 24 Lead TSSOP, E-Pad, Forced Convection
θ
JA Vs. Air Flow
Meters per Second
01
2.5
Multi-Layer PCB, JEDEC Standard Test Boards
32.1°C/W
25.5°C/W
24.0°C/W
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