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参数资料
| 型号： | ICS9147F-09LF |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 83.3 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封装： | SSOP-48 |
| 文件页数： | 2/9页 |
| 文件大小： | 580K |
| 代理商： | ICS9147F-09LF |
2
ICS9147-09
Pin Descriptions
* Bidirectional input/output pins, input logic level determined at internal power-on-reset are latched. Use 10Kohm resistor to
program logic Hi to VDD or GND for logic low.
PIN NUMBER
PIN NAME
TYPE
DESCRIPTION
2
REF
OUT
Reference clock output*
FS1
IN
Logic input frequency select Bit1*. Input latched at Poweron.
3, 9, 16, 22,
27, 33, 39, 45
GND
PWR
Ground.
4
X1
IN
Crystal input. Nominally 14.318 MHz. Has internal load cap
5
X2
OUT
Crystal output. Has internal load cap and feedack resistor to X1
41
VDDL
PWR
2.5 or 3.3V buffer power for CPUL and IOAPIC output buffers.
8, 10, 11, 12, 14,
BUS (1:5)
OUT
BUS clock outputs. see select table for frequency
15
BUS6
OUT
BUS clock output. See select table for frequency.*
FS0
IN
Logic input frequency select Bit0.*. Input latched at Poweron.
23
CPU_STOP#
IN
Halts CPU Clocks at Logic "0" level when low. Internal Pull-up
24
PD#
IN
Powers down chip, active low. Internal Pull-up
47
24M
OUT
24MHz fixed clock.*
BSEL
IN
Logic input* for selecting synchronous or asynchronous BUS
frequency- see table above. Input latched at Poweron.*
1, 6, 13, 19,
30, 36, 48
VDD3
PWR
3.3 volt core logic and buffer power
17, 18, 20, 21, 28,
29, 31, 32, 34,
35, 37, 38
SDRAM (1:12)
OUT
SDRAM clocks at CPU speed. See select table for frequency.
40
CPUH/AGP
OUT
CPU clock operates at SDRAM VDD level (3.3V nom), for AGP etc.
42, 43
CPUL (1:2)
OUT
CPU clocks .See select table for frequency. Operates at down to
2.5V controlled by VDDL pin.
7, 25, 26
N/C
—
Pins not internally connected.
46
48M
OUT
48 MHz fixed clock output*.
FS2
IN
Logic input frequency select Bit 2*. Input latched at Poweron.
44
IOAPIC
OUT
Reference clock (14.318MHz) powered by VDDL,
operating 2.5 to 3.3V.
相关PDF资料 |
PDF描述 |
|---|---|
| ICS9147F-09 | 83.3 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| ICS9148F-13 | 100 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| ICS9148F-PPP-LF | 100 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| ICS9148F-49 | 100 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO28 |
| ICS9148F-49LF | 100 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO28 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS9147F-12 | 制造商:ICS 制造商全称:ICS 功能描述:Pentium/ProTM System and Cyrix⑩ Clock Chip |
| ICS9147F-14 | 制造商:ICS 制造商全称:ICS 功能描述:Frequency Generator & Integrated Buffers for PENTIUM/ProTM |
| ICS9147F-16 | 制造商:ICS 制造商全称:ICS 功能描述:Frequency Generator & Integrated Buffers for PENTIUMTM |
| ICS9147F-22 | 制造商:ICS 制造商全称:ICS 功能描述:Pentium/ProTM System and Cyrix™ Clock Chip |
| ICS9148-02 | 制造商:ICS 制造商全称:ICS 功能描述:Pentium/ProTM System Clock Chip |
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