- 您现在的位置：买卖IC网 > PDF目录67705 > ICS9148YF-111LF (INTEGRATED DEVICE TECHNOLOGY INC) 100 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 PDF资料下载
参数资料
| 型号： | ICS9148YF-111LF |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 100 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封装： | 0.300 INCH, SSOP-48 |
| 文件页数： | 8/18页 |
| 文件大小： | 545K |
| 代理商： | ICS9148YF-111LF |
16
ICS9148-111
Third party brands and names are the property of their respective owners.
Electrical Characteristics - AGP
TA = 0 - 70 C; VDD = 3.3 V +/-5%, VDDL = 2.5 V +/-5%; CL = 30 pF (unless otherwise stated)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Output High Voltage
VOH1
IOH = -28 mA
2.4
3
V
Output Low Voltage
VOL1
IOL = 23 mA
0.32
0.4
V
Output High Current
IOH1
VOH = 2.0 V
-60
-40
mA
Output Low Current
IOL1
VOL = 0.8 V
41
54
mA
Rise Time
1
tr1
VOL = 0.4 V, VOH = 2.4 V
1.3
2
ns
Fall Time
1
tf1
VOH = 2.4 V, VOL = 0.4 V
1.2
2
ns
VT = 1.5 V, AGP0
45
51
55
%
VT = 1.5 V, AGP1:2
48
53
58
%
Skew
1
tsk1
VT = 1.5 V
110
250
ps
Jitter, Single Edge
VT = 1.5 V, AGP0
660
1200
ps
Displacement
2
VT = 1.5 V, AGP1:2
310
650
ps
1Guaranteed by design, not 100% tested in production.
2Edge displacement of a period relative to a 10-clock-cycle rolling average period.
Duty Cycle
1
dt1
tjsrd1
Electrical Characteristics - REF0, 48MHz
TA = 0 - 70 C; VDD = 3.3 V +/-5%, VDDL = 2.5 V +/-5%; CL = 20 pF (unless otherwise stated)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Output High Voltage
VOH5
IOH = -16 mA
2.4
2.6
V
Output Low Voltage
VOL5
IOL = 9 mA
0.24
0.4
V
Output High Current
IOH5
VOH = 2.0 V
-32
-22
mA
Output Low Current
IOL5
VOL = 0.8 V
16
28
mA
Rise Time
1
tr5
VOL = 0.4 V, VOH = 2.4 V
1.5
4
ns
Fall Time
1
tf5
VOH = 2.4 V, VOL = 0.4 V
2.1
4
ns
Duty Cycle
1
dt5
VT = 1.5 V, REF0
50
55
60
%
VT = 1.5 V, 48M
46
55
56
%
Jitter, Single Edge
tjsrd5
VT = 1.5 V, REF0
430
750
ps
Displacement
2
VT = 1.5 V, 48M
790
1200
ps
VT = 1.5 V, REF0
-550
350
550
ps
VT = 1.5 V, 48M
-700
520
700
ps
1Guaranteed by design, not 100% tested in production.
2Edge displacement of a period relative to a 10-clock-cycle rolling average period.
Jitter, Absolute
1
tjabs5
相关PDF资料 |
PDF描述 |
|---|---|
| ICS9148YF-12 | 66.6 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| ICS9148YF-12LF | 66.6 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| ICS9148YF-37LF-T | 100 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| ICS9148YF-82LF | 100 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| ICS91718YGLF-T | PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS9148YF-12 | 制造商:ICS 制造商全称:ICS 功能描述:Pentium/ProTM System Clock Chip |
| ICS9148YF-17-T | 制造商:ICS 制造商全称:ICS 功能描述:Frequency Generator & Integrated Buffers for PENTIUM/ProTM |
| ICS9148YF-36 | 制造商:ICS 制造商全称:ICS 功能描述:Frequency Generator & Integrated Buffers for PENTIUM/ProTM |
| ICS9148YF-46 | 制造商:ICS 制造商全称:ICS 功能描述:Pentium/ProTM System Clock Chip |
| ICS9148YF-60 | 制造商:ICS 制造商全称:ICS 功能描述:Pentium/ProTM System Clock Chip |
发布紧急采购，3分钟左右您将得到回复。