- 您现在的位置：买卖IC网 > PDF目录65535 > ICS9222YG-01LF-T 9222 SERIES, PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 2 INVERTED OUTPUT(S), PDSO28 PDF资料下载
参数资料
| 型号： | ICS9222YG-01LF-T |
| 元件分类： | 时钟及定时 |
| 英文描述： | 9222 SERIES, PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 2 INVERTED OUTPUT(S), PDSO28 |
| 封装： | 4.40 MM, 0.65 MM PITCH, ROHS COMPLIANT, MO-153, TSSOP-28 |
| 文件页数： | 4/6页 |
| 文件大小： | 93K |
| 代理商： | ICS9222YG-01LF-T |
4
ICS9222-01
0274C—11/14/05
Absolute Maximum Ratings
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.0 V
Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND –0.5 V to VDD +0.5 V
Ambient Operating Temperature . . . . . . . . . . . . . 0°C to +70°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are
stress specifications only and functional operation of the device at these or any other conditions above those listed in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may affect product reliability.
Electrical Characteristics - Input / Supply / Outputs
TA = 0 - 70C; Supply Voltage VDD = 3.3 V +/-10% (unless otherwise stated)
PARAMETER
SYMBOL
MIN
MAX
UNIT
Supply Voltage
VDD
3.135
3.465
V
REFCLK Input cycle time
tCYCLE,IN
10
40
ns
Input Cycle-to-Cycle Jitter
tJ,IN
-250
ps
Input Duty Cycle over 10K cycles
DCIN
40%
60%
tCYCLE
Input frequency of modulation
FM,IN
30
33
kHz
Modulation index
PM,IN
0.25
0.5
%
Phase detector input cycle time at PCLK (1:0) & SYNCLK (1:0)
tCYCLE,PD
30
100
ns
Initial phase error at phase detector inputs
terr,init
-0.5
0.5
tCYCLE,PD
Phase detector input duty cycle over 10K cycles
DCIN,PD
25%
75%
tCYCLE,PD
Input rise & fall times (measured at 20%-80% of input voltage)
for PCLK (1:0), SYNCLK (1:0) & REFCLK
tIR, tIF
-1
ns
Input capacitance at PCLK (1:0) & SYNCLK (1:0) & REFCLK
CIN,PD
-7
pF
Input capacitance matching at PCLK (1:0) & SYNCLK (1:0)
C
IN,PD
-0.5
pF
Input capacitance at CMOS pins
CIN,CMOS
-10
pF
Input (CMOS) signal low voltage
VIL
-0.3
VDD
Input (CMOS) signal high voltage
VIH
0.7
-
VDD
REFCLK input low voltage
VIL,R
-0.3
VDD,IR
REFCLK input high voltage
VIH,R
0.7
-
VDD,IR
Input signal low voltage for PD inputs and STOP_CLK
VIL,R
-0.3
VDD,IPD
Input signal high voltage for PD inputs and STOP_CLK
VIH,R
0.7
-
VDD,IPD
Input supply reference for REFCLK
VDD,IR
1.235
3.465
V
Input supply reference for PD inputs
VDD,IPD
1.235
3.465
V
Phase detector phase error for distributed loop measured at
PCLK (1:0) & SYNCLK (1:0)
tERR,PD
-100
100
ps
Clock Cycle time
tCYCLE
2.5
3.75
ns
Cycle-to-cycle jitter at CLK (1:0) & CLKB (1:0)
tJ
-60
ps
Total jitter over 2 ,3 or 4 cycles
tJ
-100
ps
Phase aligner phase step size CLK (1:0) & CLKB (1:0)
tSTEP
1-
ps
PLL output phase error when tracking SSC
tERR,SSC
-100
100
ps
Output crossing-point voltage
VX
1.3
1.8
V
Output voltage during Clk Stop (CLK_STOP#=0)
VX,STOP
1.1
2
V
Output Voltage swing
VCOS
0.4
1
V
Output low voltage
VOL
1-
V
Output high voltage
VOH
-2.35
V
Output duty cycle over 10K cycles
DC
40%
60%
tCYCLE
Output cycle-to-cycle duty cycle error
tDC,ERR
-50
ps
Output rise & fall times (measured at 20%-80% of input voltage)
for PCLK (1:0), SYNCLK (1:0) & REFCLK
tCR,tCF
300
500
ps
Difference between rise and fall times on a single device (20%-80%)
tCR,CF
-100
ps
Operating Supply Current 400MHz
250
mA
相关PDF资料 |
PDF描述 |
|---|---|
| ICS9222YG-01-T | 9222 SERIES, PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 2 INVERTED OUTPUT(S), PDSO28 |
| ICS9279F-03 | LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
| ICS9279F-03LF | LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
| ICS9341YF | 133.3 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| ICS93701YGLFT | 93701 SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS9248-101 | 制造商:ICS 制造商全称:ICS 功能描述:Frequency Generator & Integrated Buffers for PENTIUM/ProTM & K6 |
| ICS9248-103 | 制造商:ICS 制造商全称:ICS 功能描述:Frequency Generator & Integrated Buffers for PENTIUM/ProTM |
| ICS9248-107 | 制造商:ICS 制造商全称:ICS 功能描述:Frequency Timing Generator for PENTIUM II Systems |
| ICS9248-110 | 制造商:ICS 制造商全称:ICS 功能描述:AMD-K7TM System Clock Chip |
| ICS9248-112 | 制造商:ICS 制造商全称:ICS 功能描述:Frequency Generator & Integrated Buffers for Celeron & PII/III⑩ |
发布紧急采购，3分钟左右您将得到回复。