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参数资料
| 型号： | ICS9248YF-24 |
| 元件分类： | 时钟及定时 |
| 英文描述： | PLL BASED CLOCK DRIVER, 22 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO56 |
| 封装： | 0.300 INCH, SSOP-56 |
| 文件页数： | 2/9页 |
| 文件大小： | 83K |
| 代理商： | ICS9248YF-24 |
2
ICS9250-24
0390C—11/06/02
Group Offset Limits
General Description
Pin Configuration
The ICS9250-24 is a buffer chip, part of a two chip solution, with the ICS9248-109.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS9248YF-39 | 制造商:ICS 制造商全称:ICS 功能描述:Frequency Generator & Integrated Buffers for PENTIUM/ProTM |
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| ICS9248YF-65 | 制造商:ICS 制造商全称:ICS 功能描述:Frequency Timing Generator for PENDIUM II Systems |
| ICS9248YF-66 | 制造商:ICS 制造商全称:ICS 功能描述:Frequency Timing Generator for PENTIUM II Systems |
| ICS9248YF-72 | 制造商:ICS 制造商全称:ICS 功能描述:Frequency Timing Generator for PENTIUM II Systems |
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