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参数资料
| 型号： | ICS9248YF-72LF |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 200.01 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封装： | SSOP-48 |
| 文件页数： | 6/12页 |
| 文件大小： | 552K |
| 代理商： | ICS9248YF-72LF |
3
ICS9248-72
Preliminary Product Preview
ICS9248-72 Power Management Features:
Note:
1. LOW means outputs held static LOW as per latency requirement next page.
2. On means active.
3. PD# pulled Low, impacts all outputs including REF and 48 MHz outputs.
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Power Management Requirements:
Note:
1. Clock on/off latency is defined in the number of rising edges of free running PCICLKs between the clock disable goes low/
high to the first valid clock comes out of the device.
2. Power up latency is when PWR_DWN# goes inactive (high to when the first valid clocks are dirven from the device.
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Functionality
VDD = 3.3V±5%,VDDL = 2.5V±5% TA= 0 to 70°C
Crystal(X1,X2)=14.31818MHz
SEL133/100#
FS2
(MHz)
FS1
(MHz)
FS0
(MHz)
CPU
(MHz)
CPU/2
(MHz)
PCI
(MHz)
3V66
(MHz)
IOAPIC
(MHz)
11
1
133.30
66.65
33.325
66.65
16.66
1
10
138.01
69.01
34.505
69.01
17.25
1
01
142.91
71.45
35.725
71.45
17.86
1
10
0
147.95
73.98
36.99
73.98
18.49
10
1
152.49
76.24
38.12
76.24
19.06
10
1
0
156.99
78.49
39.245
78.49
19.62
10
0
1
162.02
81.01
40.505
81.01
20.25
10
0
180.00
89.99
30.00
60.00
15.00
01
1
100.23
50.11
33.405
66.81
16.70
01
1
0
105.00
52.49
35
70.00
17.50
01
0
1
113.99
56.99
37.83
75.66
18.91
01
0
120.00
59.99
40.00
80.00
20.00
00
1
128.51
64.25
32.125
64.25
16.06
00
1
0
200.01
100.00
33.33
66.66
16.66
00
0
1
170.03
85.01
28.33
56.66
14.16
00
0
66.82
33.40
66.80
16.7
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS9248YF-73-T | 制造商:ICS 制造商全称:ICS 功能描述:Frequency Timing Generator for Pentium II Systems |
| ICS9248YF-77 | 制造商:ICS 制造商全称:ICS 功能描述:Frequency Timing Generator for PENTIUM II Systems |
| ICS9248YF-78 | 制造商:ICS 制造商全称:ICS 功能描述:Frequency Timing Generator for Pentium II Systems |
| ICS9248YF-80-T | 制造商:ICS 制造商全称:ICS 功能描述:General Purpose 133MHz System Clock |
| ICS9248YF-81 | 制造商:ICS 制造商全称:ICS 功能描述:Frequency Generator & Integrated Buffers |
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