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参数资料
| 型号： | ICS9250YF-37-T |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 144 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 封装： | 0.300 INCH, SSOP-56 |
| 文件页数： | 8/12页 |
| 文件大小： | 343K |
| 代理商： | ICS9250YF-37-T |
5
ICS9250-37
Preliminary Product Preview
Third party brands and names are the property of their respective owners.
Byte 1: CPU, Active/Inactive Register
(1= enable, 0 = disable)
T
I
B#
N
I
PD
W
PN
O
I
T
P
I
R
C
S
E
D
7
t
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B-
1
#
0
S
F
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c
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d
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R
6
t
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B-
1
#
1
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a
b
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R
5
t
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B-
1
#
2
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4
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B-
1
#
)
#
0
1
/
3
1
L
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S
(
k
c
a
b
d
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R
3
t
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B1
5
,
0
51
3
T
/
3
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P
C
2
t
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4
,
7
41
2
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2
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1
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4
/
4
41
1
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1
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C
0
t
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B2
4
/
1
41
0
T
/
0
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U
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C
Byte 2: PCI, Active/Inactive Register
(1= enable, 0 = disable)
T
I
B#
N
I
PD
W
PN
O
I
T
P
I
R
C
S
E
D
7
t
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B8
11
7
K
L
C
I
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P
6
t
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B7
11
6
K
L
C
I
C
P
5
t
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B5
11
5
K
L
C
I
C
P
4
t
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B4
11
4
K
L
C
I
C
P
3
t
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11
3
K
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I
C
P
2
t
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B1
11
2
K
L
C
I
C
P
1
t
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B9
1
K
L
C
I
C
P
0
t
i
B8
1
0
K
L
C
I
C
P
Notes:
1. Inactive means outputs are held LOW and are disabled
from switching.
2. Latched Frequency Selects (FS#) will be inverted logic
load of the input frequency select pin conditions.
T
I
B#
N
I
PD
W
PN
O
I
T
P
I
R
C
S
E
D
7
t
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B-
1
#
3
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k
c
a
b
d
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6
t
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1
d
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v
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5
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1
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4
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1
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3
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31
3
_
6
V
3
2
t
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B4
31
2
_
6
V
3
1
t
i
B1
31
1
_
6
V
3
0
t
i
B0
31
0
_
6
V
3
Byte 4: 3V66, Active/Inactive Register
(1= enable, 0 = disable)
T
I
B#
N
I
PD
W
PN
O
I
T
P
I
R
C
S
E
D
7
t
i
B-
1
d
e
v
r
e
s
e
R
6
t
i
B-
1
d
e
v
r
e
s
e
R
5
t
i
B-
1
d
e
v
r
e
s
e
R
4
t
i
B-
1
d
e
v
r
e
s
e
R
3
t
i
B-
1
d
e
v
r
e
s
e
R
2
t
i
B-
1
d
e
v
r
e
s
e
R
1
t
i
B-
1
d
e
v
r
e
s
e
R
0
t
i
B-
1
d
e
v
r
e
s
e
R
Byte 5: Reserved , Active/Inactive Register
(1= enable, 0 = disable)
Byte 3: REF, Active/Inactive Register
(1= enable, 0 = disable)
T
I
B#
N
I
PD
W
PN
O
I
T
P
I
R
C
S
E
D
7
t
i
B
1
21
9
K
L
C
I
C
P
6
t
i
B
0
21
8
K
L
C
I
C
P
5
t
i
B
4
51
B
_
F
E
R
M
V
3
4
t
i
B
5
51
F
E
R
M
V
3
t
i
B
31
1
F
E
R
2
t
i
B
21
0
F
E
R
1
t
i
B
6
21
1
_
z
H
M
8
4
0
t
i
B
5
21
0
_
z
H
M
8
4
T
I
B#
N
I
PD
W
PN
O
I
T
P
I
R
C
S
E
D
7
t
i
B-
0
)
e
t
o
N
(
d
e
v
r
e
s
e
R
6
t
i
B-
0
)
e
t
o
N
(
d
e
v
r
e
s
e
R
5
t
i
B-
0
)
e
t
o
N
(
d
e
v
r
e
s
e
R
4
t
i
B-
0
)
e
t
o
N
(
d
e
v
r
e
s
e
R
3
t
i
B-
0
)
e
t
o
N
(
d
e
v
r
e
s
e
R
2
t
i
B-
1
)
e
t
o
N
(
d
e
v
r
e
s
e
R
1
t
i
B-
1
)
e
t
o
N
(
d
e
v
r
e
s
e
R
0
t
i
B-
0
)
e
t
o
N
(
d
e
v
r
e
s
e
R
Byte 6: Peripheral , Active/Inactive Register
(1= enable, 0 = disable)
Note: Don’t write into this register, writing into this
register can cause malfunction
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