- 您现在的位置：买卖IC网 > PDF目录67706 > ICS94203YFLF-T (INTEGRATED DEVICE TECHNOLOGY INC) 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 PDF资料下载
参数资料
| 型号： | ICS94203YFLF-T |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 封装： | 0.300 INCH, SSOP-56 |
| 文件页数： | 7/18页 |
| 文件大小： | 183K |
| 代理商： | ICS94203YFLF-T |
15
ICS94203
Fig. 1
Shared Pin Operation -
Input/Output Pins
The I/O pins designated by (input/output) on the ICS94203
serve as dual signal functions to the device. During initial
power-up, they act as input pins. The logic level (voltage) that
is present on these pins at this time is read and stored into a 5-
bit internal data latch. At the end of Power-On reset, (see AC
characteristics for timing values), the device changes the
mode of operations for these pins to an output function. In this
mode the pins produce the specified buffered clocks to external
loads.
To program (load) the internal configuration register for these
pins, a resistor is connected to either the VDD (logic 1) power
supply or the GND (logic 0) voltage potential. A 10 Kilohm
(10K) resistor is used to provide both the solid CMOS
programming voltage needed during the power-up
programming period and to provide an insignificant load on
the output clock during the subsequent operating period.
Via to
VDD
Clock trace to load
Series Term. Res.
Programming
Header
Via to Gnd
Device
Pad
2K
W
8.2K
W
Figure 1 shows a means of implementing this function when
a switch or 2 pin header is used. With no jumper is installed
the pin will be pulled high. With the jumper in place the pin
will be pulled low. If programmability is not necessary, than
only a single resistor is necessary. The programming resistors
should be located close to the series termination resistor to
minimize the current loop area. It is more important to locate
the series termination resistor close to the driver than the
programming resistor.
相关PDF资料 |
PDF描述 |
|---|---|
| ICS94209YFLF-T | 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| ICS94210YF-PPP-T-LF | 166.66 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| ICS94210YF-PPP-T-LF | 166.66 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| ICS94210YF-T | 166.66 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| ICS94210YFLF-T | 166.66 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS94203YF-T | 制造商:ICS 制造商全称:ICS 功能描述:Programmable System Frequency Generator for PII/III⑩ |
| ICS94206 | 制造商:ICS 制造商全称:ICS 功能描述:Programmable System Frequency Generator for PII/III⑩ |
| ICS94206YF-T | 制造商:ICS 制造商全称:ICS 功能描述:Programmable System Frequency Generator for PII/III⑩ |
| ICS94209 | 制造商:ICS 制造商全称:ICS 功能描述:Programmable Frequency Generator & Integrated Buffers for Pentium III Processor |
| ICS94209YF-T | 制造商:ICS 制造商全称:ICS 功能描述:Programmable Frequency Generator & Integrated Buffers for Pentium III Processor |
发布紧急采购，3分钟左右您将得到回复。