参数资料
型号: ICS950401YF-T
厂商: INTEGRATED DEVICE TECHNOLOGY INC
元件分类: 时钟产生/分配
英文描述: 220 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48
封装: 0.300 INCH, MO-118, SSOP-48
文件页数: 2/14页
文件大小: 108K
代理商: ICS950401YF-T
10
ICS950401
0499C—11/01/04
Electrical Characteristics - PCICLK, PCICLK33/HT66 (33MHz)
TA = 0 - 70 C; VDD = 3.3 V +/-5%; CL = 30 pF (unless otherwise stated)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX UNITS
Output High Voltage
VOH1
IOH = -12 mA
2.4
V
Output Low Voltage
VOL1
IOL = 9.0 mA
0.4
V
Output High Current
IOH1
VOH = 2.0 V
-15
mA
Output Low Current
IOL1
VOL = 0.8 V
10
mA
Rise Edge Rate
1
Measured from 20-60%
1
4
V/ns
Fall Edge Rate
1
Measured from 60-20%
1
4
V/ns
Duty Cycle
1
dt1
VT = 50%
45
55
%
Jitter, Cycle-to-cycle
1
tjcyc-cyc2B
Measured on rising edge @ 1.5V
250
ps
Jitter, Accumulated
1
-1000
1000
ps
Output Impedance
ZO
VO = VX
12
55
1
Guaranteed by design, not 100% tested in production.
Electrical Characteristics - PCICLK33/HT66 (66MHz)
TA = 0 - 70 C; VDD = 3.3 V +/-5%; CL = 30 pF (unless otherwise stated)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX UNITS
Output High Voltage
VOH1
IOH = -12 mA
2.4
V
Output Low Voltage
VOL1
IOL = 9.0 mA
0.4
V
Output High Current
IOH1
VOH = 2.0 V
-15
mA
Output Low Current
IOL1
VOL = 0.8 V
10
mA
Rise Edge Rate
1
Measured from 20-60%
1
4
V/ns
Fall Edge Rate
1
Measured from 60-20%
1
4
V/ns
Duty Cycle
1
dt1
VT = 50%
45
55
%
Jitter, Cycle-to-cycle
1
tjcyc-cyc2B
Measured on rising edge @ 1.5V
250
ps
Jitter, Accumulated
1
-1000
1000
ps
Output Impedance
ZO
VO = VX
12
55
1
Guaranteed by design, not 100% tested in production.
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