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参数资料
| 型号： | ICS952624YFLFT |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封装： | MO-118, SSOP-48 |
| 文件页数： | 11/17页 |
| 文件大小： | 118K |
| 代理商： | ICS952624YFLFT |
3
Integrated
Circuit
Systems, Inc.
ICS952624
0768B—08/06/03
Pin Description (Continued)
PIN #
PIN NAME
PIN TYPE
DESCRIPTION
25
3V66_3/VCH
OUT
3.3V 66.66MHz clock output
VCH: 48MHz VCH clock output
26
3V66_2
OUT
3.3V 66.66MHz clock output
27
VDD3V66
PWR
Power pin for the 3V66 clocks.
28
GND
PWR
Ground pin.
29
3V66_1
OUT
3.3V 66.66MHz clock output
30
3V66_0
OUT
3.3V 66.66MHz clock output
31
SCLK
IN
Clock pin of I2C circuitry 5V tolerant
32
SDATA
I/O
Data pin for I2C circuitry 5V tolerant
33
VttPWR_GD#
IN
This 3.3V LVTTL input is a level sensitive strobe used to determine when latch inputs
are valid and are ready to be sampled. This is an active low input.
34
VDD
OUT
Power supply, nominal 3.3V
35
SRCCLKC
OUT
Complementary clock of differential pair for S-ATA support.
+/- 300ppm accuracy required.
36
SRCCLKT
OUT
True clock of differential pair for S-ATA support.
+/- 300ppm accuracy required.
37
GND
PWR
Ground pin.
38
CPUCLKC0
OUT
"Complimentary" clocks of differential pair CPU outputs. These are current mode
outputs. External resistors are required for voltage bias.
39
CPUCLKT0
OUT
"True" clocks of differential pair CPU outputs. These are current mode outputs.
External resistors are required for voltage bias.
40
VDDCPU
PWR
Supply for CPU clocks, 3.3V nominal
41
CPUCLKC1
OUT
"Complimentary" clocks of differential pair CPU outputs. These are current mode
outputs. External resistors are required for voltage bias.
42
CPUCLKT1
OUT
"True" clocks of differential pair CPU outputs. These are current mode outputs.
External resistors are required for voltage bias.
43
GND
PWR
Ground pin.
44
CPUCLKC_ITP
OUT
"Complementary" clocks of differential pair CPU outputs for ITP.. These are current
mode outputs. External resistors are required for voltage bias.
45
CPUCLKT_ITP
OUT
"True" clocks of differential pair CPU outputs for ITP. These are current mode
outputs. External resistors are required for voltage bias.
46
IREF
OUT
This pin establishes the reference current for the differential current-mode output
pairs. This pin requires a fixed precision resistor tied to ground in order to establish
the appropriate current. 475 ohms is the standard value.
47
GND
PWR
Ground pin.
48
VDDA
PWR
3.3V power for the PLL core.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS952702 | 制造商:ICS 制造商全称:ICS 功能描述:Programmable Timing Control Hub for K7 System |
| ICS952702YFLF-T | 制造商:ICS 制造商全称:ICS 功能描述:Programmable Timing Control Hub for K7 System |
| ICS952703 | 制造商:ICS 制造商全称:ICS 功能描述:Programmable Timing Control Hub for K7 System |
| ICS952703BF | 功能描述:IC TIMING CTRL HUB K7 48-SSOP RoHS:否 类别:集成电路 (IC) >> 时钟/计时 - 专用 系列:TCH™ 标准包装:28 系列:- 类型:时钟/频率发生器 PLL:是 主要目的:Intel CPU 服务器 输入:时钟 输出:LVCMOS 电路数:1 比率 - 输入:输出:3:22 差分 - 输入:输出:无/是 频率 - 最大:400MHz 电源电压:3.135 V ~ 3.465 V 工作温度:0°C ~ 85°C 安装类型:表面贴装 封装/外壳:64-TFSOP （0.240"，6.10mm 宽） 供应商设备封装:64-TSSOP 包装:管件 |
| ICS952703BFLF | 功能描述:IC TIMING CTRL HUB K7 48-SSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 专用 系列:TCH™ 标准包装:28 系列:- 类型:时钟/频率发生器 PLL:是 主要目的:Intel CPU 服务器 输入:时钟 输出:LVCMOS 电路数:1 比率 - 输入:输出:3:22 差分 - 输入:输出:无/是 频率 - 最大:400MHz 电源电压:3.135 V ~ 3.465 V 工作温度:0°C ~ 85°C 安装类型:表面贴装 封装/外壳:64-TFSOP （0.240"，6.10mm 宽） 供应商设备封装:64-TSSOP 包装:管件 |
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