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参数资料
| 型号： | ICSSSTUAF32866C |
| 厂商： | Integrated Device Technology, Inc. |
| 英文描述： | 25-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2 |
| 中文描述： | 25位可配置注册缓冲内存 |
| 文件页数： | 21/31页 |
| 文件大小： | 562K |
| 代理商： | ICSSSTUAF32866C |
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ICSSSTUAF32866C
25-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2
COMMERCIAL TEMPERATURE GRADE
25-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2
21
ICSSSTUAF32866C
7100/9
Register Timing
Timing Diagram for the First SSTUAF32866C (1:2 Register-A Configuration) Device Used in a Pair; C0 = 0, C1 = 1, RESET Held
HIGH
NOTE:
1.If the data is clocked in on the n clock pulse, the QERR output signal will be generated on the n+1 clock pulse, and it will be valid on the n+2 clock pulse.
If an error occurs and the QERR output is driven low, it stays latched low for a minimum of two clock cycles or until RESET is driven low.
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| ICSSSTUAF32866CHLFT | 25-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2 |
| ICSSSTUAF32868A | 28-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2 |
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| ICSSSTUAH32865A | 25-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2 |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ICSSSTUAF32866CHLFT | 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:25-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2 |
| ICSSSTUAF32868A | 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:28-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2 |
| ICSSSTUAF32868AHLFT | 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:28-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2 |
| ICSSSTUAF32868B | 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:28-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2 |
| ICSSSTUAF32868BHLF | 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:28-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2 |
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