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| 型号： | IDT5T9890NLI8 |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟及定时 |
| 英文描述： | 5T SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC68 |
| 封装： | PLASTIC, VFQFPN-68 |
| 文件页数： | 26/37页 |
| 文件大小： | 277K |
| 代理商： | IDT5T9890NLI8 |
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32
INDUSTRIALTEMPERATURERANGE
IDT5T9890
EEPROM PROGRAMMABLE 2.5V PROGRAMMABLE SKEW PLL CLOCK DRIVER
NOTES:
1. Five consecutive TCLK cycles with TMS = 1 will reset the TAP.
2. TAP controller must be reset before normal PLL operations can begin.
RefertotheIEEEStandardTestAccessPortSpecification(IEEEStd.1149.1)
forthefullstatediagram
All state transitions within the TAP controller occur at the rising edge of
theTCLKpulse.TheTMSsignallevel(0or1)determinesthestateprogression
thatoccursoneachTCLKrisingedge.TheTAPcontrollertakesprecedence
over the PLL and must be reset after power up of the device. See TRST
description for more details on TAP controller reset.
Test-Logic-ResetAlltestlogicisdisabledinthiscontrollerstateenabling
thenormaloperationoftheIC.TheTAPcontrollerstatemachineisdesigned
insuchawaythat,nomatterwhattheinitialstateofthecontrolleris,theTest-
Logic-Reset state can be entered by holding TMS at high and pulsing TCLK
five times. This is the reason why the Test Reset (TRST) pin is optional.
Run-Test-Idle In this controller state, the test logic in the IC is active only
ifcertaininstructionsarepresent.Forexample,ifaninstructionactivatesthe
selftest,thenitwillbeexecutedwhenthecontrollerentersthisstate.Thetest
logic in the IC is idles otherwise.
Select-DR-Scan This is a controller state where the decision to enter the
Data Path or the Select-IR-Scan state is made.
Select-IR-Scan This is a controller state where the decision to enter the
Instruction Path is made. The Controller can return to the Test-Logic-Reset
stateotherwise.
Capture-IRInthiscontrollerstate,theshiftregisterbankintheInstruction
Register parallel loads a pattern of fixed values on the rising edge of TCLK.
The last two significant bits are always required to be “01”.
Shift-IR In this controller state, the instruction register gets connected
between TDI and TDO, and the captured pattern gets shifted on each rising
edgeofTCLK.TheinstructionavailableontheTDIpinisalsoshiftedintothe
instructionregister.
Exit1-IRThisisacontrollerstatewhereadecisiontoentereitherthePause-
IR state or Update-IR state is made.
Pause-IR This state is provided in order to allow the shifting of instruction
register to be temporarily halted.
Exit2-DRThisisacontrollerstatewhereadecisiontoentereithertheShift-
IR state or Update-IR state is made.
Update-IR Inthiscontrollerstate,theinstructionintheinstructionregister
islatchedintothelatchbankof theInstructionRegister on every fallingedge
ofTCLK.Thisinstructionalsobecomesthecurrentinstructiononceitislatched.
Capture-DRInthiscontrollerstate,thedataisparallelloadedintothedata
registers selected by the current instruction on the rising edge of TCLK.
Shift-DR, Exit1-DR, Pause-DR, Exit2-DR and Update-DR These
controller states are similar to the Shift-IR, Exit1-IR, Pause-IR, Exit2-IR and
Update-IRstatesintheInstructionpath.
TAP Controller State Diagram
Test-Logic
Reset
Run-Test/
Idle
Select-
DR-Scan
Capture-DR
Shift-DR
Exit1-DR
Pause-DR
Exit2-DR
Update-DR
Select-
IR-Scan
Capture-IR
Shift-IR
Exit1-IR
Pause-IR
Exit2-IR
Update-IR
0
1
0
1
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