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| 型号： | IDT5T9890NLI8 |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟及定时 |
| 英文描述： | 5T SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC68 |
| 封装： | PLASTIC, VFQFPN-68 |
| 文件页数： | 8/37页 |
| 文件大小： | 277K |
| 代理商： | IDT5T9890NLI8 |
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16
INDUSTRIALTEMPERATURERANGE
IDT5T9890
EEPROM PROGRAMMABLE 2.5V PROGRAMMABLE SKEW PLL CLOCK DRIVER
SINGLE-ENDED INPUT AC TEST CONDITIONS FOR 2.5V LVTTL
Symbol
Parameter
Value
Units
VIH
Input HIGH Voltage
VDD
V
VIL
InputLOWVoltage
0V
VTHI
InputTimingMeasurementReferenceLevel(1)
VDD/2
V
tR, tF
InputSignalEdgeRate(2)
2
V/ns
NOTES:
1. A nominal 1.25V timing measurement reference level is specified to allow constant, repeatable results in an automatic test equipment (ATE) environment.
2. The input signal edge rate of 2V/ns or greater is to be maintained in the 10% to 90% range of the input waveform.
DIFFERENTIAL INPUT AC TEST CONDITIONS FOR 2.5V LVTTL
Symbol
Parameter
Value
Units
VDIF
Input Signal Swing(1)
VDD
V
VX
DifferentialInputSignalCrossingPoint(2)
VDD/2
V
VTHI
InputTimingMeasurementReferenceLevel(3)
CrossingPoint
V
tR, tF
InputSignalEdgeRate(4)
2.5
V/ns
NOTES:
1. A nominal 2.5V peak-to-peak input pulse level is specified to allow consistent, repeatable results in an automatic test equipment (ATE) environment. This device meets the VDIF
(AC) specification under actual use conditions.
2. A nominal 1.25V crossing point level is specified to allow consistent, repeatable results in an automatic test equipment (ATE) environment. This device meets the VX specification
under actual use conditions.
3. In all cases, input waveform timing is marked at the differential cross-point of the input signals.
4. The input signal edge rate of 2.5V/ns or greater is to be maintained in the 20% to 80% range of the input waveform.
NOTES:
1. These power consumption characteristics are for all the valid input interfaces and cover the worst case input and output interface combinations.
2. The termination resistors are excluded from these measurements.
3. If the differential input interface is used, the true input is held LOW and the complementary input is held HIGH.
4. Bit 60 = 1.
5. All outputs are at the same interface level.
POWER SUPPLY CHARACTERISTICS FOR 2.5V LVTTL OUTPUTS(1)
Symbol
Parameter
Test Conditions(2)
Typ.
Max
Unit
IDDQ
Quiescent VDD Power Supply Current(3)
VDDQN = Max., REF = LOW, PD = HIGH, nSOE = LOW,
112
150
mA
PLL_EN = HIGH, Outputs enabled, All outputs unloaded
IDDQQ
Quiescent VDDQN Power Supply Current(3)
VDDQN = Max., REF = LOW, PD = HIGH, nSOE = LOW,
20
75
A
PLL_EN = HIGH, Outputs enabled, All outputs unloaded
IDDPD
Power Down Current
VDD = Max., PD = LOW, nSOE = LOW, PLL_EN = HIGH
0.7
3
mA
IDDD
Dynamic VDD Power Supply
VDD = Max., VDDQN = Max., CL = 0pF
19
30
A/MHz
CurrentperOutput
IDDDQ
Dynamic VDDQN Power Supply
VDD = Max., VDDQN = Max., CL = 0pF
32
40
A/MHz
CurrentperOutput
ITOT
Total Power VDD Supply Current(4,5)
VDDQN = 2.5V., FVCO = 100MHz, CL = 15pF
275
400
mA
VDDQN = 2.5V., FVCO = 250MHz, CL = 15pF
315
450
ITOTQ
Total Power VDDQN Supply Current(4,5)
VDDQN = 2.5V., FVCO = 100MHz, CL = 15pF
215
320
mA
VDDQN = 2.5V., FVCO = 250MHz, CL = 15pF
355
530
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