- 您现在的位置：买卖IC网 > PDF目录67712 > IDT5T9955BFGI8 (INTEGRATED DEVICE TECHNOLOGY INC) 5T SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PBGA96 PDF资料下载
参数资料
| 型号： | IDT5T9955BFGI8 |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟及定时 |
| 英文描述： | 5T SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PBGA96 |
| 封装： | GREEN, FBGA-96 |
| 文件页数： | 5/11页 |
| 文件大小： | 137K |
| 代理商： | IDT5T9955BFGI8 |
3
INDUSTRIALTEMPERATURERANGE
IDT5T9955
2.5V PROGRAMMABLE SKEW DUAL PLL CLOCK DRIVER TURBOCLOCK W
NOTE:
1. Capacitance applies to all inputs except TEST, xFS, xnF[1:0], and xDS[1:0].
CAPACITANCE(TA=+25°C,f=1MHz,VIN=0V)
Parameter
Description
Typ.
Max.
Unit
CIN
InputCapacitance
REF
8
10
pF
Others
5
7
NOTE:
1. Stresses beyond those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions above those indicated in the
operational sections of this specification is not implied. Exposure to absolute-
maximum-rated conditions for extended periods may affect device reliability.
ABSOLUTE MAXIMUM RATINGS(1)
Symbol
Description
Max
Unit
VDDQ, VDD
Supply Voltage to Ground
–0.5 to +4.6
V
VI
DC Input Voltage
–0.5 to VDD+0.5
V
REF Input Voltage
–0.5 to +4.6
V
Maximum Power
TA = 85°C
1.1
W
Dissipation
TA = 55°C
1.9
TSTG
Storage Temperature Range
–65 to +150
°C
NOTE:
1. When TEST = MID and xsOE = HIGH, PLL remains active with xnF[1:0] = LL functioning as an output disable control for individual output banks. Skew selections remain
in effect unless xnF[1:0] = LL.
PIN DESCRIPTION
Pin Name
Type
Description
REF
IN
ReferenceClockInput
xFB
IN
Individual Feedback Inputs for A and B banks
TEST(1)
IN
When MID or HIGH, disables PLL for A and B banks (except for conditions of Note 1). REF goes to all outputs. Skew Selections (See
ControlSummaryTable)remainineffect. SetLOWfornormaloperation.
xsOE(1)
IN
Individual Synchronous Output Enable for A and B banks. When HIGH, it stops clock outputs (except x2Q0 and x2Q1) in a LOW state
(for xPE = H) - x2Q0 and x2Q1may be used as the feedback signal to maintain phase lock. When TEST is held at MID level and xsOE
is HIGH, the nF[1:0] pins act as output disable controls for individual banks when xnF[1:0] = LL. Set xsOE LOW for normal operation
(hasinternalpull-down).
xPE
IN
IndividualSelectablepositiveornegativeedgecontrolforAandBbanks. WhenLOW/HIGHtheoutputsaresynchronizedwiththenegative/
positiveedgeofthereferenceclock(hasinternalpull-up).
xnF[1:0]
IN
3-level inputs for selecting 1 of 9 skew taps or frequency functions
xFS
IN
Selectsappropriateoscillatorcircuitbasedonanticipatedfrequencyrange. (SeeProgrammableSkewRange.) IndividualcontrolonA
and B banks.
xnQ[1:0]
OUT
Eightbanksoftwooutputswithprogrammableskew
xDS[1:0]
IN
3-level inputs for feedback divider selection for A and B banks
xPD
IN
Power down control. Shuts off either A or B bank of the chip when LOW (has internal pull-up).
xLOCK
OUT
PLL lock indication signal for A and B banks. HIGH indicates lock. LOW indicates that the PLL is not locked and outputs may not be
synchronized to the inputs. (For more information on application specific use of the LOCK pin, please see AN237.)
VDDQ
PWR
Powersupplyforoutputbuffers
VDD
PWR
Powersupplyforphaselockedloop,lockoutput,andotherinternalcircuitry
GND
PWR
Ground
相关PDF资料 |
PDF描述 |
|---|---|
| IDT5V9888PFGI8 | 500 MHz, OTHER CLOCK GENERATOR, PQFP32 |
| IDT5V9888PFGI | 500 MHz, OTHER CLOCK GENERATOR, PQFP32 |
| IDT5V9955BFGI | 5V SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PBGA96 |
| IDT7216L20J8 | 16-BIT, DSP-MULTIPLIER, PQCC68 |
| IDT7216L25PQF | 16-BIT, DSP-MULTIPLIER, PQFP64 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| IDT5T995APPGI | 功能描述:IC CLK DRIVER 2.5V PLL 44-TQFP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:TurboClock™ II 标准包装:1,000 系列:- 类型:时钟/频率合成器，扇出分配 PLL:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 除法器/乘法器:- 电源电压:- 工作温度:- 安装类型:表面贴装 封装/外壳:56-VFQFN 裸露焊盘 供应商设备封装:56-VFQFP-EP（8x8） 包装:带卷 (TR) 其它名称:844S012AKI-01LFT |
| IDT5T995APPGI8 | 功能描述:IC CLK DRIVER 2.5V PLL 44-TQFP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:TurboClock™ II 标准包装:1,000 系列:- 类型:时钟/频率合成器，扇出分配 PLL:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 除法器/乘法器:- 电源电压:- 工作温度:- 安装类型:表面贴装 封装/外壳:56-VFQFN 裸露焊盘 供应商设备封装:56-VFQFP-EP（8x8） 包装:带卷 (TR) 其它名称:844S012AKI-01LFT |
| IDT5V19EE403NLGI | 制造商:Integrated Device Technology Inc 功能描述:IC CLOCK GENERATOR 24QFN |
| IDT5V19EE403NLGI8 | 制造商:Integrated Device Technology Inc 功能描述:IC CLK GEN VCXO PROGR 24QFN |
| IDT5V19EE404NLGI | 制造商:Integrated Device Technology Inc 功能描述:IC CLOCK GENERATOR 24QFN |
发布紧急采购，3分钟左右您将得到回复。