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参数资料
| 型号： | IDT7008L25G |
| 厂商： | IDT, Integrated Device Technology Inc |
| 文件页数： | 12/19页 |
| 文件大小： | 0K |
| 描述： | IC SRAM 512KBIT 25NS 84PGA |
| 标准包装： | 3 |
| 格式 - 存储器： | RAM |
| 存储器类型： | SRAM - 双端口，异步 |
| 存储容量： | 512K (64K x 8) |
| 速度： | 25ns |
| 接口： | 并联 |
| 电源电压： | 4.5 V ~ 5.5 V |
| 工作温度： | 0°C ~ 70°C |
| 封装/外壳： | 84-BPGA |
| 供应商设备封装： | 84-PGA（27.94x27.94） |
| 包装： | 托盘 |
| 其它名称： | 7008L25G |
IDT7008S/L
High-Speed 64K x 8 Dual-Port Static RAM
Military, Industrial and Commercial Temperature Ranges
AC Electrical Characteristics Over the
Operating Temperature and Supply Voltage Range (6)
7008X15
Com'l Only
7008X20
Com'l
& Ind
7008X25
Com'l &
Military
7008X35
Com'l &
Military
7008X55
Com'l, Ind &
Military
Symbol
Parameter
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
Unit
BUSY TIMING (M/ S =V IH )
t BAA
t BDA
t BAC
t BDC
t APS
BUSY Access Time from Address Match
BUSY Disable Time from Address Not Matched
BUSY Access Time from Chip Enable Low
BUSY Access Time from Chip Enable High
Arbitration Priority Set-up Time (2)
____
____
____
____
5
15
15
15
15
____
____
____
____
____
5
20
20
20
17
____
____
____
____
____
5
20
20
20
17
____
____
____
____
____
5
20
20
20
20
____
____
____
____
____
5
45
40
40
35
____
ns
ns
ns
ns
ns
Write Hold After BUSY
t BDD
t WH
BUSY Disable to Valid Data
(5)
(3)
____
12
15
____
____
15
20
____
____
17
25
____
____
25
35
____
____
25
55
____
ns
ns
BUSY TIMING (M/ S =V IL )
Write Hold After BUSY
t WB
t WH
BUSY Input to Write (4)
(5)
0
12
____
____
0
15
____
____
0
17
____
____
0
25
____
____
0
25
____
____
ns
ns
PORT-TO-PORT DELAY TIMING
t WDD
t DDD
Write Pulse to Data Delay (1)
Write Data Valid to Read Data Delay (1)
____
____
30
25
____
____
45
30
____
____
50
35
____
____
60
45
____
____
80
65
ns
ns
3198 tbl 14
NOTES:
1. Port-to-port delay through RAM cells from writing port to reading port, refer to "Timing Waveform of Write with Port-to-Port Read and BUSY (M/ S = V IH )".
2. To ensure that the earlier of the two ports wins.
3. t BDD is a calculated parameter and is the greater of 0, t WDD – t WP (actual) or t DDD – t DW (actual).
4. To ensure that the write cycle is inhibited on port "B" during contention on port "A".
5. To ensure that a write cycle is completed on port "B" after contention on port "A".
6. 'X' in part numbers indicates power rating (S or L).
12
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相关代理商/技术参数 |
参数描述 |
|---|---|
| IDT7008L25GB | 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:HIGH-SPEED 64K x 8 DUAL-PORT STATIC RAM |
| IDT7008L25GI | 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:HIGH-SPEED 64K x 8 DUAL-PORT STATIC RAM |
| IDT7008L25J | 功能描述:IC SRAM 512KBIT 25NS 84PLCC RoHS:否 类别:集成电路 (IC) >> 存储器 系列:- 标准包装:1,000 系列:- 格式 - 存储器:RAM 存储器类型:SRAM - 双端口，同步 存储容量:1.125M（32K x 36） 速度:5ns 接口:并联 电源电压:3.15 V ~ 3.45 V 工作温度:-40°C ~ 85°C 封装/外壳:256-LBGA 供应商设备封装:256-CABGA（17x17） 包装:带卷 (TR) 其它名称:70V3579S5BCI8 |
| IDT7008L25J8 | 功能描述:IC SRAM 512KBIT 25NS 84PLCC RoHS:否 类别:集成电路 (IC) >> 存储器 系列:- 标准包装:1,000 系列:- 格式 - 存储器:RAM 存储器类型:SRAM - 双端口，同步 存储容量:1.125M（32K x 36） 速度:5ns 接口:并联 电源电压:3.15 V ~ 3.45 V 工作温度:-40°C ~ 85°C 封装/外壳:256-LBGA 供应商设备封装:256-CABGA（17x17） 包装:带卷 (TR) 其它名称:70V3579S5BCI8 |
| IDT7008L25JB | 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:HIGH-SPEED 64K x 8 DUAL-PORT STATIC RAM |
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