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| 型号： | IDT70T3799M |
| 厂商： | Integrated Device Technology, Inc. |
| 英文描述： | HIGH-SPEED 2.5V 256/128K x 72 SYNCHRONOUS DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE |
| 中文描述： | 高速与3.3V 2.5V的256/128K × 72 SYNCHRONOU S双，端口静态RAM或2.5V的接口 |
| 文件页数： | 7/25页 |
| 文件大小： | 316K |
| 代理商： | IDT70T3799M |
6.42
IDT70T3719/99M
High-Speed 2.5V 256/128K x 72 Dual-Port Synchronous Static RAM Industrial and Commercial Temperature Ranges
Absolute Maximum Ratings
(1)
Advanced
Symbol
Rating
Commercial
& Industrial
Unit
V
TERM
(V
DD
)
V
DD
Termnal Voltage
with Respect to GND
-0.5 to 3.6
V
V
TERM
(2)
(V
DDQ
)
V
DDQ
Termnal Voltage
with Respect to GND
-0.3 to V
DDQ
+ 0.3
V
V
TERM
(2)
(INPUTS and I/O's)
Input and I/O Termnal
Voltage wth Respect to GND
-0.3 to V
DDQ
+ 0.3
V
T
BIAS
(3)
Temperature Under Bias
-55 to +125
o
C
T
STG
Storage Temperature
-65 to +150
o
C
T
JN
Junction Temperature
+150
o
C
I
OUT
(For V
DDQ
=
3.3V) DC Output Current
50
mA
I
OUT
(For V
DDQ
=
2.5V) DC Output Current
40
mA
5687 tbl 07
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUMRATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation of the
device at these or any other conditions above those indicated in the operational sections
of this specification is not implied. Exposure to absolute maximumrating conditions for
extended periods may affect reliability.
2. This is a steady-state DC parameter that applies after the power supply has reached its
nomnal operating value. Power sequencing is not necessary; however, the voltage on
any Input or I/O pin cannot exceed V
DDQ
during power supply ramp up.
3. Ambient Temperature under DC Bias. No AC Conditions. Chip Deselected.
NOTES:
1. These parameters are determned by device characterization, but are not
production tested.
2. C
OUT
also references C
I/O
.
Capacitance
(1)
(T
A
= +25°C, F = 1.0MH
Z
)
DC Elec tric al Charac teristic s Over the Operating
Temperature and S upply Voltage Range
(V
DD
= 2.5V ± 100mV )
Symbol
Parameter
Test Conditions
70T3719/99M
Unit
Mn.
Max.
|
LI
|
Input Leakage Current
(1)
V
DDQ
= Max., V
IN
= 0V to V
DDQ
___
10
μA
|
LI
|
JTAG & ZZ Input Leakage Current
(1,2)
V
DD =
Max.
,
V
IN
= 0V to V
DD
___
±30
μA
|
LO
|
Output Leakage Current
(1,3)
CE
0
= V
IH
or CE
1
= V
IL
, V
OUT
= 0V to V
DDQ
___
10
μA
V
OL
(3.3V)
Output LowVoltage
(1)
I
OL
= +4mA, V
DDQ
= Mn.
___
0.4
V
V
OH
(3.3V)
Output High Voltage
(1)
I
OH
= -4mA, V
DDQ
= Min.
2.4
___
V
V
OL
(2.5V)
Output LowVoltage
(1)
I
OL
= +2mA, V
DDQ
= Mn.
___
0.4
V
V
OH
(2.5V)
Output High Voltage
(1)
I
OH
= -2mA, V
DDQ
= Min.
2.0
___
V
5687 tbl 09
NOTES:
1. V
DDQ
is selectable (3.3V/2.5V) via OPT pins. Refer to p.5 for details.
2. Applicable only for TMS, TDI and
TRST
inputs.
3. Outputs tested in tri-state mode.
Symbol
Parameter
Conditions
(2)
Max.
Unit
C
IN
Input Capacitance
V
IN
= 0V
15
pF
C
OUT
(2)
Output Capacitance
V
OUT
= 0V
10.5
pF
5687 tbl 08
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