参数资料
型号: IDT70V3569S4BF8
厂商: IDT, Integrated Device Technology Inc
文件页数: 12/17页
文件大小: 0K
描述: IC SRAM 576KBIT 4NS 208FBGA
标准包装: 1,000
格式 - 存储器: RAM
存储器类型: SRAM - 双端口,同步
存储容量: 576K(16K x 36)
速度: 4ns
接口: 并联
电源电压: 3.15 V ~ 3.45 V
工作温度: 0°C ~ 70°C
封装/外壳: 208-LFBGA
供应商设备封装: 208-CABGA(15x15)
包装: 带卷 (TR)
其它名称: 70V3569S4BF8
IDT70V3569S
High-Speed 16K x 36 Dual-Port Synchronous Pipelined Static RAM
Industrial and Commercial Temperature Ranges
Timing Waveform of Left Port Write to Pipelined
Right Port Read (1,2)
CLK L
R/ W L
t SW
t SA
t HW
t HA
ADDRESS L
DATA INL
MATCH
t SD
t HD
VALID
NO
MATCH
t CO (3)
CLK R
t CD2
R/ W R
t SW
t SA
t HW
t HA
ADDRESS R
DATA OUTR
MATCH
NO
MATCH
VALID
t DC
4831 drw 08
NOTES:
1. CE 0 , BE n , and ADS = V IL ; CE 1 , CNTEN , and CNTRST = V IH .
2. OE = V IL for the Right Port, which is being read from. OE = V IH for the Left Port, which is being written to.
3. If t CO < minimum specified, then data from right port read is not valid until following right port clock cycle (ie, time from write to valid read on opposite port will
be t CO + 2 t CYC2 + t CD2 ). If t CO > minimum, then data from right port read is available on first right port clock cycle (ie, time from write to valid read on opposite
port will be t CO + t CYC + t CD2 ).
Timing Waveform of Pipelined Read-to-Write-to-Read
( OE = V IL ) (2) t CYC2
t CH2 t CL2
CLK
CE 0
CE 1
t SC
t SB
t HC
t HB
BE n
t SW t HW
R/ W
t SW t HW
(3)
ADDRESS
An
An +1
An + 2
An + 2
An + 3
An + 4
DATA IN
t SA
t HA
t SD t HD
Dn + 2
DATA OUT
(1)
t CD2
Qn
t CKHZ
t CKLZ
t CD2
Qn + 3
READ
NOP
(4)
WRITE
READ
4831 drw 09
NOTES:
1. Output state (High, Low, or High-impedance) is determined by the previous cycle control signals.
2. CE 0 , BE n , and ADS = V IL ; CE 1 , CNTEN , and CNTRST = V IH . "NOP" is "No Operation".
3. Addresses do not have to be accessed sequentially since ADS = V IL constantly loads the address on the rising edge of the CLK; numbers
are for reference use only.
4. "NOP" is "No Operation." Data in memory at the selected address may be corrupted and should be re-written to guarantee data integrity.
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6.42
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