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| 型号： | IDT70V9279L7PRFI |
| 厂商： | IDT, Integrated Device Technology Inc |
| 文件页数： | 4/19页 |
| 文件大小： | 0K |
| 描述： | IC SRAM 512KBIT 7NS 128TQFP |
| 标准包装： | 6 |
| 格式 - 存储器： | RAM |
| 存储器类型： | SRAM - 双端口，同步 |
| 存储容量： | 512K (32K x 16) |
| 速度： | 7ns |
| 接口： | 并联 |
| 电源电压： | 3 V ~ 3.6 V |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 128-LQFP |
| 供应商设备封装： | 128-TQFP（14x20） |
| 包装： | 托盘 |
| 其它名称： | 70V9279L7PRFI |
IDT70V9279/69S/L
High-Speed 32/16K x 16 Dual-Port Synchronous Static RAM
Truth Table II—Address Counter Control (1,2,3)
Industrial and Commercial Temperature Ranges
Previous
Internal
L
External
Address
An
X
X
X
Internal
Address
X
An
An + 1
X
Address
Used
An
An + 1
An + 1
A 0
CLK
↑
↑
↑
↑
ADS
L (4)
H
H
X
CNTEN
X
(5)
H
X
CNTRST
H
H
H
L (4)
I/O (3)
D I/O (n)
D I/O (n+1)
D I/O (n+1)
D I/O (0)
MODE
External Address Used
Counter Enabled—Internal Address generation
External Address Blocked —Counter disabled (An + 1 reused)
Counter Reset to Address 0
NOTES:
1. "H" = V IH, "L" = V IL, "X" = Don't Care.
2. CE 0 , LB , UB , and OE = V IL ; CE 1 and R/ W = V IH .
3. Outputs configured in Flow-Through Output mode; if outputs are in Pipelined mode the data out will be delayed by one cycle.
4. ADS and CNTRST are independent of all other signals including CE 0 , CE 1 , UB and LB .
5. The address counter advances if CNTEN = V IL on the rising edge of CLK, regardless of all other signals including CE 0 , CE 1 , UB and LB .
3743 tbl 03
Recommended Operating
Temperature and Supply Voltage (1,2)
Recommended DC Operating
Conditions
Grade
Commercial
Industrial
Ambient
Temperature
0 O C to +70 O C
-40 O C to +85 O C
GND
0V
0V
V DD
3.3V + 0.3V
3.3V + 0.3V
Symbol
V DD
V SS
V IH
Parameter
Supply Voltage
Ground
Input High Voltage
Min.
3.0
0
2.2
Typ.
3.3
0
____
Max.
3.6
0
V DD +0.3V (2)
Unit
V
V
V
NOTES:
3743 tbl 04
1. Industrial temperature: for specific speeds, packages and powers contact your
V IL
Input Low Voltage
-0.3 (1)
____
0.8
V
sales office.
2. This is the parameter T A . This is the "instant on" case temperature.
NOTES:
1. V IL > -1.5V for pulse width less than 10 ns.
2. V TERM must not exceed V DD + 0.3V.
3743 tbl 05
Absolute Maximum Ratings (1)
Symbol Rating Commercial
& Industrial
Unit
Capacitance (1)
(T A = +25°C, f = 1.0MH Z )
Symbol Parameter
Conditions
Max.
Unit
V TERM (2)
Terminal Voltage
with Respect to
-0.5 to +4.6
V
C IN
Input Capacitance
V IN = 0V
9
pF
C OUT
T BIAS (3)
GND
Temperature Under Bias
-55 to +125
o
C
(2)
Output Capacitance
V OUT = 0V
10
pF
3743 tbl 07
T STG
T JN
StorageTemperature
Junction Temperature
-65 to +150
+150
o
o
C
C
NOTES:
1. These parameters are determined by device characterization, but are not
production tested.
2. C OUT also references C I/O .
I OUT
DC Output Current
50
mA
3743 tbl 06
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may
cause permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated
in the operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect reliability.
2. V TERM must not exceed V DD + 0.3V for more than 25% of the cycle time or 10ns
maximum, and is limited to < 20mA for the period of V TERM > V DD + 0.3V.
3. Ambient Temperature Under DC Bias. No AC Conditions. Chip Deselected.
6.42
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