参数资料
型号: IDT71321LA25PFI8
厂商: IDT, Integrated Device Technology Inc
文件页数: 4/17页
文件大小: 0K
描述: IC SRAM 16KBIT 25NS 64TQFP
标准包装: 750
格式 - 存储器: RAM
存储器类型: SRAM - 双端口,异步
存储容量: 16K (2K x 8)
速度: 25ns
接口: 并联
电源电压: 4.5 V ~ 5.5 V
工作温度: -40°C ~ 85°C
封装/外壳: 64-LQFP
供应商设备封装: 64-TQFP(14x14)
包装: 带卷 (TR)
其它名称: 71321LA25PFI8
IDT71321SA/LA and IDT71421SA/LA
High Speed 2K x 8 Dual-Port Static RAM with Interrupts
Industrial and Commercial Temperature Ranges
DC Electrical Characteristics Over the Operating
Temperature and Supply Voltage Range (1,4) (V CC = 5.0V ± 10%)
71321X20
71421X20
Com'l Only
71321X25
71421X25
Com'l
& Ind
Symbol
Parameter
Test Condition
Version
Typ.
Max.
Typ.
Max.
Unit
I CC
Dynamic Operating
Current
(Both Ports Active)
CE L and CE R = V IL ,
Outputs Disabled
f = f MAX (2)
COM'L
IND
SA
LA
SA
110
110
____
250
200
____
110
110
110
220
170
270
mA
LA
____
____
110
220
I SB1
Standby Current
(Both Ports - TTL
CE L and CE R = V IH
f = f MAX (2)
COM'L
SA
LA
30
30
65
45
30
30
65
45
mA
Level Inputs)
IND
SA
LA
____
____
____
____
30
30
75
55
I SB2
Standby Current
(One Port - TTL
Level Inputs)
CE "A" = V IL and CE "B" = V IH (5)
Active Port Outputs Disabled,
f=f MAX (2)
COM'L
IND
SA
LA
SA
65
65
____
165
125
____
65
65
65
150
115
170
mA
LA
____
____
65
140
I SB3
Full Standby Current
(Both Ports -
CMOS Level Inputs)
CE L and
CE R > V CC - 0.2V,
V IN > V CC - 0.2V or
V IN < 0.2V, f = 0 (3)
COM'L
IND
SA
LA
SA
1.0
0.2
____
15
5
____
1.0
0.2
1.0
15
5
30
mA
LA
____
____
0.2
10
I SB4
Full Standby Current
(One Port -
CMOS Level Inputs)
CE "A" < 0.2V and
CE "B" > V CC - 0.2V (5)
V IN > V CC - 0.2V or V IN < 0.2V
Active Port Outputs Disabled,
f = f MAX (2)
COM'L
IND
SA
LA
SA
LA
60
60
____
____
155
115
____
____
60
60
60
60
145
105
165
130
mA
2691 tbl 04a
71321X35
71421X35
Com'l Only
71321X55
71421X55
Com'l
& Ind
Symbol
Parameter
Test Condition
Version
Typ.
Max.
Typ.
Max.
Unit
I CC
Dynamic Operating
Current
(Both Ports Active)
CE L and CE R = V IL ,
Outputs Disabled
f = f MAX (2)
COM'L
IND
SA
LA
SA
80
80
____
165
120
____
65
65
65
155
110
190
mA
LA
____
____
65
140
I SB1
Standby Current
(Both Ports - TTL
CE L and CE R = V IH
f = f MAX (2)
COM'L
SA
LA
25
25
65
45
20
20
65
35
mA
Level Inputs)
IND
SA
LA
____
____
____
____
20
20
70
50
I SB2
Standby Current
(One Port - TTL
Level Inputs)
CE "A" = V IL and CE "B" = V IH (5)
Active Port Outputs Disabled,
f=f MAX (2)
COM'L
IND
SA
LA
SA
50
50
____
125
90
____
40
40
40
110
75
125
mA
LA
____
____
40
90
I SB3
Full Standby Current
(Both Ports -
CMOS Level Inputs)
CE L and
CE R > V CC - 0.2V,
V IN > V CC - 0.2V or
V IN < 0.2V, f = 0 (3)
COM'L
IND
SA
LA
SA
1.0
0.2
____
15
4
____
1.0
0.2
1.0
15
4
30
mA
LA
____
____
0.2
10
I SB4
Full Standby Current
(One Port -
CMOS Level Inputs)
CE "A" < 0.2V and
CE "B" > V CC - 0.2V (5)
V IN > V CC - 0.2V or V IN < 0.2V
Active Port Outputs Disabled,
f = f MAX (2)
COM'L
IND
SA
LA
SA
LA
45
45
____
____
110
85
____
____
40
40
40
40
100
70
110
85
mA
NOTES:
2691 tbl 04b
1. 'X' in part numbers indicates power rating (SA or LA).
2. At f = f MAX , address and control lines (except Output Enable) are cycling at the maximum frequency read cycle of 1/t RC , and using “AC TEST CONDITIONS” of input
levels of GND to 3V.
3. f = 0 means no address or control lines change. Applies only to inputs at CMOS level standby.
4. Vcc = 5V, T A =+25°C for Typ and is not production tested. Vcc DC = 100mA (Typ)
5. Port "A" may be either left or right port. Port "B" is opposite from port "A".
6.42
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