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参数资料
| 型号： | IDT71321LA55TF8 |
| 厂商： | IDT, Integrated Device Technology Inc |
| 文件页数： | 15/17页 |
| 文件大小： | 0K |
| 描述： | IC SRAM 16KBIT 55NS 64STQFP |
| 标准包装： | 1,250 |
| 格式 - 存储器： | RAM |
| 存储器类型： | SRAM - 双端口，异步 |
| 存储容量： | 16K (2K x 8) |
| 速度： | 55ns |
| 接口： | 并联 |
| 电源电压： | 4.5 V ~ 5.5 V |
| 工作温度： | 0°C ~ 70°C |
| 封装/外壳： | 64-LQFP |
| 供应商设备封装： | 64-TQFP（10x10） |
| 包装： | 带卷 (TR) |
| 其它名称： | 71321LA55TF8 |
IDT71321SA/LA and IDT71421SA/LA
High Speed 2K x 8 Dual-Port Static RAM with Interrupts
Industrial and Commercial Temperature Ranges
Truth Tables
Truth Table I. Non-Contention Read/Write Control (4)
Left or Right Port (1)
R/ W
X
X
L
H
H
CE
H
H
L
L
L
OE
X
X
X
L
H
D 0-7
Z
Z
DATA IN
DATA OUT
Z
Function
Port Disabled and in Power-Down Mode, ISB 2 or ISB 4
CE R = CE L = V IH , Power-Down Mode, ISB 1 or ISB 3
Data on Port Written Into Memory (2)
Data in Memory Output on Por t (3)
High Impedance Outputs
NOTES:
1. A 0L – A 10L ≠ A 0R – A 10R .
2. If BUSY = L, data is not written.
3. If BUSY = L, data may not be valid, see t WDD and t DDD timing.
4. 'H' = V IH , 'L' = V IL , 'X' = DON’T CARE, 'Z' = HIGH IMPEDANCE
Truth Table II. Interrupt Flag (1,4)
Left Port
Right Port
2691 tbl 12
L
H
L
H
R/ W L
L
X
X
X
CE L
L
X
X
L
OE L
X
X
X
L
A 10L -A 0L
7FF
X
X
7FE
INT L
X
X
(3)
(2)
R/ W R
X
X
L
X
CE R
X
L
L
X
OE R
X
L
X
X
A 10R -A 0R
X
7FF
7FE
X
INT R
(2)
(3)
X
X
Function
Set Right INT R Flag
Reset Right INT R Flag
Set Left INT L Flag
Reset Left INT L Flag
NOTES :
1. Assumes BUSY L = BUSY R = V IH
2. If BUSY L = V IL , then No Change.
3. If BUSY R = V IL , then No Change.
4. 'H' = HIGH, 'L' = LOW, 'X' = DON’T CARE
Truth Table III — Address BUSY Arbitration
2691 tbl 13
Inputs
Outputs
CE L
X
H
X
L
CE R
X
X
H
L
A 0L -A 10L
A 0R -A 10R
NO MATCH
MATCH
MATCH
MATCH
BUSY L (1)
H
H
H
(2)
BUSY R (1)
H
H
H
(2)
Function
Normal
Normal
Normal
Write Inhibit (3)
2691 tbl 14
NOTES:
1. Pins BUSY L and BUSY R are both outputs for IDT71321 (Master). Both are inputs for IDT71421 (Slave). BUSY X outputs on the IDT71321 are open drain, not push-
pull outputs. On slaves the BUSY X input internally inhibits writes.
2. 'L' if the inputs to the opposite port were stable prior to the address and enable inputs of this port. 'H' if the inputs to the opposite port became stable after the address
and enable inputs of this port. If t APS is not met, either BUSY L or BUSY R = LOW will result. BUSY L and BUSY R outputs can not be LOW simultaneously.
3. Writes to the left port are internally ignored when BUSY L outputs are driving LOW regardless of actual logic level on the pin. Writes to the right port are internally ignored
when BUSY R outputs are driving LOW regardless of actual logic level on the pin.
15
6.42
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相关代理商/技术参数 |
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|---|---|
| IDT71321LA55TFG | 制造商:Integrated Device Technology Inc 功能描述:IC SRAM 16KBIT 55NS 64TQFP |
| IDT71321LA55TFG8 | 制造商:Integrated Device Technology Inc 功能描述:IC SRAM 16KBIT 55NS 64TQFP |
| IDT71321SA20J | 功能描述:IC SRAM 16KBIT 20NS 52PLCC RoHS:否 类别:集成电路 (IC) >> 存储器 系列:- 标准包装:72 系列:- 格式 - 存储器:RAM 存储器类型:SRAM - 同步 存储容量:9M（256K x 36） 速度:75ns 接口:并联 电源电压:3.135 V ~ 3.465 V 工作温度:-40°C ~ 85°C 封装/外壳:100-LQFP 供应商设备封装:100-TQFP（14x14） 包装:托盘 其它名称:71V67703S75PFGI |
| IDT71321SA20J8 | 功能描述:IC SRAM 16KBIT 20NS 52PLCC RoHS:否 类别:集成电路 (IC) >> 存储器 系列:- 标准包装:72 系列:- 格式 - 存储器:RAM 存储器类型:SRAM - 同步 存储容量:9M（256K x 36） 速度:75ns 接口:并联 电源电压:3.135 V ~ 3.465 V 工作温度:-40°C ~ 85°C 封装/外壳:100-LQFP 供应商设备封装:100-TQFP（14x14） 包装:托盘 其它名称:71V67703S75PFGI |
| IDT71321SA20PF | 功能描述:IC SRAM 16KBIT 20NS 64TQFP RoHS:否 类别:集成电路 (IC) >> 存储器 系列:- 标准包装:72 系列:- 格式 - 存储器:RAM 存储器类型:SRAM - 同步 存储容量:9M（256K x 36） 速度:75ns 接口:并联 电源电压:3.135 V ~ 3.465 V 工作温度:-40°C ~ 85°C 封装/外壳:100-LQFP 供应商设备封装:100-TQFP（14x14） 包装:托盘 其它名称:71V67703S75PFGI |
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