参数资料
型号: IDT71V25761S183PFG
厂商: IDT, Integrated Device Technology Inc
文件页数: 8/21页
文件大小: 0K
描述: IC SRAM 4MBIT 183MHZ 100TQFP
标准包装: 72
格式 - 存储器: RAM
存储器类型: SRAM - 同步
存储容量: 4.5M(128K x 36)
速度: 183MHz
接口: 并联
电源电压: 3.135 V ~ 3.465 V
工作温度: 0°C ~ 70°C
封装/外壳: 100-LQFP
供应商设备封装: 100-TQFP(14x20)
包装: 托盘
IDT71V25761 128K x 36, 3.3V Synchronous SRAMs with
2.5V I/O, Pipelined Outputs, Burst Counter, Single Cycle Deselect
Commercial and Industrial Temperature Ranges
DC Electrical Characteristics Over the Operating
Temperature and Supply Voltage Range (V DD = 3.3V ± 5%)
ZZ, LBO and JTAG Input Leakage Current
Symbol
|I LI |
|I LZZ |
|I LO |
V OL
V OH
Input Leakage Current
Output Leakage Current
Output Low Voltage
Output High Voltage
Parameter
(1)
Test Conditions
V DD = Max., V IN = 0V to V DD
V DD = Max., V IN = 0V to V DD
V OUT = 0V to V DDQ , Device Deselected
I OL = +6mA, V DD = Min.
I OH = -6mA, V DD = Min.
Min.
___
___
___
___
2.0
Max.
5
30
5
0.4
___
Unit
μA
μA
μA
V
V
NOTE:
5297 tbl 08
1. The LBO , TMS, TDI, TCK and TRST pins will be internally pulled to V DD and the ZZ pin will be internally pulled to V SS if they are not actively driven in the application.
DC Electrical Characteristics Over the Operating
Temperature and Supply Voltage Range (1)
200MHz
183MHz
166MHz
Symbol
I DD
Parameter
Operating Power Supply
Test Conditions
Device Selected, Outputs Open, V DD = Max.,
Com'l Only
360
Com'l
340
Ind
350
Com'l
320
Ind
330
Unit
mA
Current
V DDQ = Max., V IN > V IH or < V IL , f = f MAX (2)
I SB1
CMOS Standby Power
Device Deselected, Outputs Open, V DD = Max.,
30
30
35
30
35
mA
Supply Current
V DDQ = Max., V IN > V HD or < V LD , f = 0 (2,3)
I SB2
Clock Running Power
Device Deselected, Outputs Open, V DD = Max.,
130
120
130
110
120
mA
Supply Current
V DDQ = Max., V IN > V HD or < V LD , f = f MAX (2,3)
I ZZ
Full Sleep Mode Supply
ZZ > V HD, V DD = Max.
30
30
35
30
35
mA
Current
NOTES:
1. All values are maximum guaranteed values.
2. At f = f MAX, inputs are cycling at the maximum frequency of read cycles of 1/t CYC while ADSC = LOW; f=0 means no input lines are changing.
3. For I/Os V HD = V DDQ - 0.2V, V LD = 0.2V. For other inputs V HD = V DD - 0.2V, V LD = 0.2V.
5297 tbl 09
AC Test Conditions
(V DDQ = 2.5V)
Input Pulse Levels
Input Rise/Fall Times
0 to 2.5V
2ns
AC Test Load
I/O
Z 0 = 50 Ω
V DDQ /2
50 Ω
5297 drw 06
,
Input Timing Reference Levels
Output Timing Reference Levels
AC Test Load
(V DDQ /2)
(V DDQ /2)
See Figure 1
6
5
Figure 1. AC Test Load
Δ tCD
5297 tbl 10
4
3
(Typical, ns)
2
1
20 30 50
80 100
Capacitance (pF)
200
5297 drw 07
,
Figure 2. Lumped Capacitive Load, Typical Derating
8
6.42
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