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参数资料
| 型号： | IDT72V3613L20PF |
| 厂商： | IDT, Integrated Device Technology Inc |
| 文件页数： | 2/25页 |
| 文件大小： | 0K |
| 描述： | IC FIFO CLOCK 64X36 20NS 120TQFP |
| 标准包装： | 45 |
| 系列： | 72V |
| 功能： | 同步 |
| 存储容量： | 2.3K（64 x 36） |
| 数据速率： | 50MHz |
| 访问时间： | 20ns |
| 电源电压： | 3 V ~ 3.6 V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 120-LQFP |
| 供应商设备封装： | 120-TQFP（14x14） |
| 包装： | 托盘 |
| 其它名称： | 72V3613L20PF |
10
IDT72V3613 3.3V, CMOS CLOCKED FIFO WITH
BUS-MATCHING AND BYTE SWAPPING 64 x 36
COMMERCIALTEMPERATURERANGE
NOTE:
1. X is the value in the Almost-Empty flag and Almost-Full flag Offset register
SYNCHRO-
NIZED
TO CLKB
TOCLKA
EF
AE
AF
FF
0L
L
H
1 to X
H
L
H
(X+ 1) to [64 - (X + 1)]
HHHH
(64 - X) to 63
H
L
H
64
H
L
NUMBER OF 36-BIT
WORDS IN THE FIFO(1)
TABLE 4 – FIFO FLAG OPERATION
are ignored. When reading the FIFO with a byte or word size on port B,EFis
set LOW when the fourth byte or second word of the last long word is read.
TheFIFOreadpointerisincrementedeachtimeanewwordisclockedto
itsoutputregister. ThestatemachinethatcontrolstheEFmonitorsawrite-pointer
andread-pointercomparatorthatindicateswhentheFIFOmemorystatusis
empty, empty+1, or empty+2. A word written to the FIFO can be read to the
FIFO output register in a minimum of three port B clock (CLKB) cycles.
Therefore,anEFisLOWifawordinmemoryisthenextdatatobesenttothe
FIFOoutputregisterandtwoCLKBcycleshavenotelapsedsincethetimethe
wordwaswritten. TheEFoftheFIFOissetHIGHbythesecondLOW-to-HIGH
transition of CLKB, and the new data word can be read to the FIFO output
registerinthefollowingcycle.
ALOW-to-HIGHtransitiononCLKBbeginsthefirstsynchronizationcycle
ofawriteiftheclocktransitionoccursattimetSKEW1orgreaterafterthewrite.
Otherwise,thesubsequentCLKBcyclecanbethefirstsynchronizationcycle
(see Figure 10).
FULL FLAG (FF)
The FIFO Full Flag is synchronized to the port clock that writes data to its
array(CLKA). WhentheFFisHIGH,aFIFOmemorylocationisfreetoreceive
newdata. Nomemorylocationsarefreewhenthe FF isLOWandattempted
writes to the FIFO are ignored.
EachtimeawordiswrittentotheFIFO,itswrite-pointerisincremented. The
state machine that controls the FF monitors a write-pointer and read-pointer
comparatorthatindicateswhentheFIFOmemorystatusisfull,full-1,orfull-2.
FromthetimeawordisreadfromtheFIFO,itspreviousmemorylocationisready
tobewritteninaminimumofthreeCLKAcycles.Therefore,aFFisLOWifless
thantwoCLKAcycleshaveelapsedsincethenextmemorywritelocationhas
beenread.ThesecondLOW-to-HIGHtransitionontheFFsynchronizingclock
afterthereadsetstheFFHIGHanddatacanbewritteninthefollowingclockcycle.
ALOW-to-HIGHtransitiononCLKAbeginsthefirstsynchronizationcycle
of a read if the clock transition occurs at time tSKEW1 or greater after the read.
Otherwise,thesubsequentclockcyclecanbethefirstsynchronizationcycle
(see Figure 11).
ALMOST-EMPTY FLAG (AE)
TheFIFOAlmost-Emptyflagissynchronizedtotheportclockthatreadsdata
fromitsarray(CLKB).ThestatemachinethatcontrolstheAEflagmonitorsa
write-pointer and read-pointer comparator that indicates when the FIFO
memory status is almost-empty, almost-empty+1, or almost-empty+2. The
almost-emptystateisdefinedbythevalueoftheAlmost-FullandAlmost-Empty
Offsetregister(X).Thisregisterisloadedwithoneoffourpresetvaluesduring
adevicereset(seeresetabove). TheAEflagisLOWwhentheFIFOcontains
X or less long words in memory and is HIGH when the FIFO contains (X+1)
or more long words.
TwoLOW-to-HIGHtransitionsontheportBClock(CLKB)arerequiredafter
aFIFOwritefortheAEflagtoreflectthenewleveloffill. Therefore,theAEflag
ofaFIFOcontaining(X+1)ormorelongwordsremainsLOWiftwoCLKBcycles
havenotelapsedsincethewritethatfilledthememorytothe(X+1)level. The
AEflagissetHIGHbythesecondCLKBLOW-to-HIGHtransitionaftertheFIFO
write that fills memory to the (X+1) level. A LOW-to-HIGH transition of CLKB
beginsthefirstsynchronizationcycle ifitoccursattimetSKEW2orgreaterafter
thewritethatfillstheFIFOto(X+1)longwords. Otherwise,thesubsequentCLKB
cycle can be the first synchronization cycle (see Figure 12).
ALMOST FULL FLAG (AF)
TheFIFOAlmost-Fullflagissynchronizedtotheportclockthatwritesdata
toitsarray(CLKA). ThestatemachinethatcontrolsanAFflagmonitorsawrite-
pointer and read-pointer comparator that indicates when the FIFO memory
statusisalmost-full,almost-full-1,oralmost-full-2. Thealmost-fullstateisdefined
bythevalueoftheAlmost-FullandAlmost-EmptyOffsetregister(X). Thisregister
isloadedwithoneoffourpresetvaluesduringadevicereset(seeResetsection).
The AF flag is LOW when the FIFO contains (64-X) or more long words in
memory and is HIGH when the FIFO contains [64-(X+1)] or less long words.
TwoLOW-to-HIGHtransitionsontheportAClock(CLKA)arerequiredafter
aFIFOreadfortheAFflagtoreflectthenewleveloffill. Therefore,theAFflag
ofaFIFOcontaining[64-(X+1)]orlesswordsremainsLOWiftwoCLKAcycles
have not elapsed since the read that reduced the number of long words in
memoryto[64-(X+1)]. TheAFflagissetHIGHbythesecondCLKALOW-to-
HIGHtransitionaftertheFIFOreadthatreducesthenumberoflongwordsin
memory to [64-(X+1)]. A LOW-to-HIGH transition on CLKA begins the first
synchronization cycle if it occurs at time tSKEW2 or greater after the read that
reduces the number of long words in memory to [64-(X+1)]. Otherwise, the
subsequentCLKAcyclecanbethefirstsynchronizationcycle(seeFigure13).
MAILBOX REGISTERS
Two36-bitbypassregisters(mail1,mail2)areontheIDT72V3613topass
commandandcontrolinformationbetweenportAandportBwithoutputtingit
inqueue.ALOW-to-HIGHtransitiononCLKAwritesA0-A35datatothemail1
registerwhenaportAwriteisselectedbyCSA,W/RA,andENAwithMBAHIGH.
A LOW-to-HIGH transition on CLKB writes B0-B35 data to the mail2 register
when a port B write is selected by CSB, W/RB and ENB, and both SIZ0 and
SIZ1areHIGH. Writingdatatoamailregistersetsitscorrespondingflag(MBF1
or MBF2) LOW. Attempted writes to a mail register are ignored while its mail
flagisLOW.
WhentheportBdata(B0-B35)outputsareactive,thedataonthebuscomes
fromtheFIFOoutputregisterwheneitheroneorbothSIZ1andSIZ0areLOW
and from the mail1 register when both SIZ1 and SIZ0 are HIGH. The Mail1
Register Flag (MBF1) is set HIGH by a rising CLKB edge when a port B read
isselectedbyCSB,W/RB,andENB,andbothSIZ1andSIZ0HIGH. TheMail2
Register Flag (MBF2) is set HIGH by a rising CLKA edge when a port A read
isselectedbyCSA,W/RA,andENAwithMBAHIGH. Thedatainamailregister
remainsintactafteritisreadandchangesonlywhennewdataiswrittentothe
register.SeeFigure14and15forrelevantmailregisterandmailregisterflag
timingdiagrams.
DYNAMIC BUS SIZING
The port B bus can be configured in a 36-bit long word, 18-bit word, or 9-
bitbyteformatfordatareadfromtheFIFO.Word-andbyte-sizebusselections
canutilizethemostsignificantbytesofthebus(Big-Endian)orleastsignificant
bytesofthebus(Little-Endian).PortBbus-sizecanbechangeddynamically
andsynchronoustoCLKB tocommunicatewithperipheralsofvariousbuswidths.
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| IDT72V3613L20PF8 | 功能描述:IC FIFO CLOCK 64X36 20NS 120TQFP RoHS:否 类别:集成电路 (IC) >> 逻辑 - FIFO 系列:72V 标准包装:90 系列:7200 功能:同步 存储容量:288K（16K x 18） 数据速率:100MHz 访问时间:10ns 电源电压:4.5 V ~ 5.5 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:64-LQFP 供应商设备封装:64-TQFP（14x14） 包装:托盘 其它名称:72271LA10PF |
| IDT72V3613L20PQF | 功能描述:IC FIFO CLOCK 64X36 20NS 132PQFP RoHS:否 类别:集成电路 (IC) >> 逻辑 - FIFO 系列:72V 标准包装:90 系列:7200 功能:同步 存储容量:288K（16K x 18） 数据速率:100MHz 访问时间:10ns 电源电压:4.5 V ~ 5.5 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:64-LQFP 供应商设备封装:64-TQFP（14x14） 包装:托盘 其它名称:72271LA10PF |
| IDT72V3614L12PF | 功能描述:IC FIFO 64X36X2 12NS 120QFP RoHS:否 类别:集成电路 (IC) >> 逻辑 - FIFO 系列:72V 标准包装:90 系列:7200 功能:同步 存储容量:288K（16K x 18） 数据速率:100MHz 访问时间:10ns 电源电压:4.5 V ~ 5.5 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:64-LQFP 供应商设备封装:64-TQFP（14x14） 包装:托盘 其它名称:72271LA10PF |
| IDT72V3614L12PF8 | 功能描述:IC FIFO 64X36X2 12NS 120QFP RoHS:否 类别:集成电路 (IC) >> 逻辑 - FIFO 系列:72V 标准包装:90 系列:7200 功能:同步 存储容量:288K（16K x 18） 数据速率:100MHz 访问时间:10ns 电源电压:4.5 V ~ 5.5 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:64-LQFP 供应商设备封装:64-TQFP（14x14） 包装:托盘 其它名称:72271LA10PF |
| IDT72V3614L12PQF | 功能描述:IC FIFO 64X36X2 12NS 132QFP RoHS:否 类别:集成电路 (IC) >> 逻辑 - FIFO 系列:72V 标准包装:90 系列:7200 功能:同步 存储容量:288K（16K x 18） 数据速率:100MHz 访问时间:10ns 电源电压:4.5 V ~ 5.5 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:64-LQFP 供应商设备封装:64-TQFP（14x14） 包装:托盘 其它名称:72271LA10PF |
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