参数资料
型号: IDT74LVC823ASO8
厂商: INTEGRATED DEVICE TECHNOLOGY INC
元件分类: 总线收发器
英文描述: LVC/LCX/Z SERIES, 9-BIT DRIVER, TRUE OUTPUT, PDSO24
封装: 1.27 MM PITCH, SOIC-24
文件页数: 1/6页
文件大小: 116K
代理商: IDT74LVC823ASO8
1
EXTENDEDCOMMERCIALTEMPERATURERANGE
IDT74LVC823A
3.3V CMOS 9-BIT BUS-INTERFACE FLIP-FLOP
APRIL 1999
1999
Integrated Device Technology, Inc.
DSC-4608/-
c
IDT74LVC823A
ADVANCE
INFORMATION
EXTENDED COMMERCIAL TEMPERATURE RANGE
DESCRIPTION:
The LVC823A 9-bit bus-interface flip-flop is built using advanced dual
metal CMOS technology. The LVC823A device is designed specifically for
driving highly capacitive or relatively low-impedance loads. The device is
particularly suitable for implementing wider buffer registers, I/O ports,
bidirectional bus drivers with parity, and working registers.
With the clock-enable (
CLKEN) input low, the nine D-type edge-
triggered flip-flops enter data on the low-to-high transitions of the clock.
Taking
CLKEN high disables the clock buffer, latching the outputs. This
device has noninverting data (D) inputs. Taking the clear (
CLR) input low
causes the nine Q outputs to go low, independently of the clock.
A buffered output-enable (
OE)inputcanbeusedtoplacethenineoutputs
in either a normal logic state (high or low logic levels) or a high-impedance
state.
OE does not affect internal operations of the latch. Previously stored
data can be retained or new data can be entered while the outputs are in
the high-impedance state.
The LVC823A has been designed with a ±24mA output driver. This
driver is capable of driving a moderate to heavy load while maintaining
speed performance.
To ensure the high-impedance state during power up or power down,
OE should be tied to VCC through a pullup resistor; the minimum value of
the resistor is determined by the current-sinking capability of the driver.
Inputs can be driven from either 3.3V or 5V devices. This feature allows
the use of this device as a translator in a mixed 3.3V/5V system environ-
ment.
FEATURES:
0.5 MICRON CMOS Technology
ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
1.27mm pitch SOIC, 0.65mm pitch SSOP,
0.635mm pitch QSOP, 0.65mm pitch TSSOP packages
Extended commercial range of – 40°C to +85°C
–VCC = 3.3V ±0.3V, Normal Range
–VCC = 2.3V to 3.6V, Extended Range
CMOS power levels (0.4 W typ. static)
Rail-to-Rail output swing for increased noise margin
All inputs, outputs and I/O are 5 Volt tolerant
Supports hot insertion
3.3V CMOS 9-BIT
BUS-INTERFACE FLIP-FLOP
WITH 3-STATE OUTPUTS
AND 5 VOLT TOLERANT I/O
Functional Block Diagram
Drive Features for LVC823A:
High Output Drivers:
±24mA
Reduced system switching noise
OE
C1
1
D
CLKEN
1
D
TO EIG HT O TH ER CHAN NELS
1
14
2
23
1
Q
CLR
11
13
CLK
R
APPLICATIONS:
5V and 3.3V mixed voltage systems
Data communication and telecommunication systems
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