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| 型号： | IDT74LVCH16827APV8 |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 总线收发器 |
| 英文描述： | LVC/LCX/Z SERIES, DUAL 10-BIT DRIVER, TRUE OUTPUT, PDSO56 |
| 封装： | SSOP-56 |
| 文件页数： | 1/6页 |
| 文件大小： | 72K |
| 代理商： | IDT74LVCH16827APV8 |
INDUSTRIALTEMPERATURERANGE
IDT74LVCH16827A
3.3V CMOS 20-BIT BUFFER WITH 5V TOLERANT I/O AND BUS-HOLD
1
JANUARY 2004
INDUSTRIAL TEMPERATURE RANGE
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
2004 Integrated Device Technology, Inc.
DSC-4072/4
FEATURES:
Typical tSK(o) (Output Skew) < 250ps
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
VCC = 3.3V ± 0.3V, Normal Range
VCC = 2.7V to 3.6V, Extended Range
CMOS power levels (0.4
μμμμμ W typ. static)
All inputs, outputs, and I/O are 5V tolerant
Supports hot insertion
Available in SSOP and TSSOP packages
FUNCTIONAL BLOCK DIAGRAM
DRIVE FEATURES:
High Output Drivers: ±24mA
Reduced system switching noise
APPLICATIONS:
5V and 3.3V mixed voltage systems
Data communication and telecommunication systems
IDT74LVCH16827A
DESCRIPTION:
This 20-bit buffer is built using advanced dual metal CMOS technology.
The 20-bit bus driver provides high-performance bus interface buffering
for wide data/address paths or busses carrying parity. Two pair of NAND-
ed output enable controls offer maximum control flexibility and are orga-
nized to operate the device as two 10-bit buffers or one 20-bit buffer. Flow-
through organization of signal pins simplifies layout. All inputs are designed
with hysteresis for improved noise margin.
The LVCH16827A buffer is ideally suited for driving high capacitance
loads and low impedance backplanes. The output buffers are designed
with power off disable capability to allow “live insertion” of boards when
used as backplane drivers.
All pins can be driven from either 3.3V or 5V devices. This feature allows
the use of this device as a translator in a mixed 3.3V/5V supply system.
The LVCH16827A has been designed with a ±24mA output driver. This
driver is capable of driving a moderate to heavy load while maintaining
speed performance.
The LVCH16827A has “bus-hold” which retains the inputs’ last state
whenever the input goes to a high impedance. This prevents floating inputs
and eliminates the need for pull-up/down resistors.
3.3V CMOS 20-BIT BUFFER
WITH 5 VOLT TOLERANT I/O
AND BUS-HOLD
1
A1
1
OE1
1
Y1
1
OE2
TO NINE OTHER CHANNELS
2
A1
2
OE1
2
Y1
2
OE2
1
56
55
2
28
29
42
15
TO NINE OTHER CHANNELS
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