参数资料
型号: IDT74LVCH16827APV8
厂商: INTEGRATED DEVICE TECHNOLOGY INC
元件分类: 总线收发器
英文描述: LVC/LCX/Z SERIES, DUAL 10-BIT DRIVER, TRUE OUTPUT, PDSO56
封装: SSOP-56
文件页数: 2/6页
文件大小: 72K
代理商: IDT74LVCH16827APV8
INDUSTRIALTEMPERATURERANGE
2
IDT74LVCH16827A
3.3V CMOS 20-BIT BUFFER WITH 5V TOLERANT I/O AND BUS-HOLD
SSOP/ TSSOP
TOP VIEW
PIN CONFIGURATION
Symbol
Description
Max
Unit
VTERM
Terminal Voltage with Respect to GND
–0.5 to +6.5
V
TSTG
Storage Temperature
–65 to +150
° C
IOUT
DC Output Current
–50 to +50
mA
IIK
Continuous Clamp Current,
–50
mA
IOK
VI < 0 or VO < 0
ICC
Continuous Current through each
±100
mA
ISS
VCC or GND
ABSOLUTE MAXIMUM RATINGS(1)
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
NOTE:
1. As applicable to the device type.
Symbol
Parameter
(1)
Conditions
Typ.
Max.
Unit
CIN
Input Capacitance
VIN = 0V
4.5
6
pF
COUT
Output Capacitance
VOUT = 0V
6.5
8
pF
CI/O
I/O Port Capacitance
VIN = 0V
6.5
8
pF
CAPACITANCE (TA = +25°C, F = 1.0MHz)
NOTE:
1. These pins have "Bus-Hold". All other pins are standard inputs, outputs, or I/Os.
1
OE1
1
Y1
1
Y2
GND
1
Y3
1
Y4
VCC
1
Y5
1
Y6
GND
1
Y7
1
Y8
1
Y9
1
Y10
2
Y2
2
Y3
GND
2
Y4
2
Y5
2
Y6
VCC
2
Y7
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
48
49
50
51
52
53
54
55
56
1
OE2
1
A1
1
A2
GND
1
A3
1
A4
VCC
1
A5
1
A6
1
A7
1
A8
1
A9
1
A10
GND
2
A2
2
A3
2
A4
2
A5
GND
2
A6
2
A7
2
A8
GND
2
Y9
2
Y10
2
OE1
25
26
27
28
32
31
30
29
GND
2
A9
2
A10
2
OE2
2
Y1
2
Y8
VCC
2
A1
Pin Names
Description
x
OEx
Output Enable Inputs (Active LOW)
x A x
Data Inputs(1)
x Y x
3-StateOutputs
PIN DESCRIPTION
FUNCTION TABLE(1)
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
Z = High Impedance
Inputs
Outputs
x
OE1
x
OE2
xAx
xYx
LL
L
LL
H
HX
X
Z
XH
X
Z
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