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参数资料
| 型号： | IDT74SSTVN16859PAG8 |
| 厂商： | IDT, Integrated Device Technology Inc |
| 文件页数： | 4/7页 |
| 文件大小： | 0K |
| 描述： | IC BUFFER 13-26BIT SSTL 64-TSSOP |
| 产品变化通告： | Product Discontinuation 09/Dec/2011 |
| 标准包装： | 2,000 |
| 逻辑类型： | 13 位至 26 位寄存缓冲器，带 SSTL_2 输入和输出 |
| 电源电压： | 2.3 V ~ 2.7 V |
| 位数： | 13，26 |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 64-TFSOP （0.240"，6.10mm 宽） |
| 供应商设备封装： | 64-TSSOP |
| 包装： | 带卷 (TR) |
| 其它名称： | 74SSTVN16859PAG8 |
4
COMMERCIALTEMPERATURERANGE
IDT74SSTVN16859
13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL I/O
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
VIK
ControlInputs
VDD = 2.5V, II=
18mA
—
–1.2
V
VOH
VDD = 2.5V to 2.7V, IOH = -100
μAVDD – 0.2
—
V
VDD = 2.5V, IOH = -8mA
1.95
—
VOL
VDD = 2.5V to 2.7V, IOL = 100
μA
—
0.2
V
VDD = 2.5V, IOL = 8mA
—
0.35
II
AllInputs
VDD = 2.7V,VI = VDD or GND
—
±5
μA
IDD
StaticStandby
IO = 0, VDD = 2.7V, RESET = GND
—
0.01
mA
StaticOperating
IO = 0, VDD = 2.7V, RESET = VDD, VI = VIH (AC) or VIL (AC)
——
20
Dynamic Operating (Clock Only)
IO = 0, VDD = 2.7V, RESET = VDD, VI = VIH (AC) or VIL (AC),—
6
—
μA/Clock
CLK and CLK Switching 50% Duty Cycle.
MHz
IDDD
DynamicOperating
IO = 0, VDD = 2.7V, RESET = VDD, VI = VIH (AC) or VIL (AC),—
43
—
μA/Clock
(PerEachDataInput)(1)
CLK and CLK Switching 50% Duty Cycle. One Data Input
MHz/Data
Switching at Half Clock Frequency, 50% Duty Cycle.
Input
DataInputs
VDD = 2.6V, VI = VREF
± 310mV
2
—
3
CI
CLK and CLK
VICR = 1.3V, VI (PP) = 360mV
2
—
3
pF
RESET
VI = VDD or GND
2
—
3
NOTE:
1. Power dissipation levels will allow operation at DDR400 speeds without excessive die temperature.
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE FOR PC3200
FollowingConditionsApplyUnlessOtherwiseSpecified:
Operating Condition: TA = 0°C to +70°C, VDD = 2.6V ±0.1V, VDDQ = 2.6V ±0.1V
OPERATING CHARACTERISTICS, TA = 25C (1)
Symbol
Parameter
Min.
Typ.(1)
Max.
Unit
VDD
SupplyVoltage
VDDQ
—
2.7
V
VDDQ
OutputSupplyVoltage
PC1600 - PC12700
2.3
2.5
2.7
V
PC3200
2.5
2.6
2.7
VREF
ReferenceVoltage(VREF=VDDQ/2) PC1600 - PC2700
1.15
1.25
1.35
V
PC3200
1.25
1.3
1.35
VTT
TerminationVoltage
VREF– 40mV
VREF
VREF+ 40mV
V
VI
InputVoltage
0
—
VDD
V
VIH
AC High-Level Input Voltage
DataInputs
VREF+ 310mV
—
V
VIL
AC Low-Level Input Voltage
DataInputs
—
VREF– 310mV
V
VIH
DC High-Level Input Voltage
DataInputs
VREF+ 150mV
—
V
VIL
DC Low-Level Input Voltage
DataInputs
—
VREF– 150mV
V
VIH
High-LevelInputVoltage
RESET
1.7
—
V
VIL
Low-LevelInputVoltage
RESET
—
0.7
V
VICR
Common-ModeInputRange
CLK, CLK
0.97
—
1.53
V
VI(PP)
Peak-to-PeakInputVoltage
CLK, CLK
360
—
mV
IOH
High-LevelOutputCurrent
—
– 16
mA
IOL
Low-LevelOutputCurrent
—
16
TA
OperatingFree-AirTemperature
0
—
+70
°C
NOTE:
1. The RESET input of the device must be held at VDD or GND to ensure proper device operation.
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