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参数资料
| 型号： | IDT9DB801CGLFT |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟及定时 |
| 英文描述： | 9DB SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48 |
| 封装： | 6.10 MM, 0.50 MM PITCH, ROHS COMPLIANT, MO-153, TSSOP-48 |
| 文件页数： | 2/20页 |
| 文件大小： | 277K |
| 代理商： | IDT9DB801CGLFT |
10
Integrated
Circuit
Systems, Inc.
ICS9DB801
1015B—09/07/06
General SMBus serial interface information for the ICS9DB801
How to Write:
Controller (host) sends a start bit.
Controller (host) sends the write address DC
(H)
ICS clock will
acknowledge
Controller (host) sends the begining byte location = N
ICS clock will
acknowledge
Controller (host) sends the data byte count = X
ICS clock will
acknowledge
Controller (host) starts sending
Byte N through
Byte N + X -1
(see Note 2)
ICS clock will
acknowledge each byte one at a time
Controller (host) sends a Stop bit
How to Read:
Controller (host) will send start bit.
Controller (host) sends the write address DC
(H)
ICS clock will
acknowledge
Controller (host) sends the begining byte
location = N
ICS clock will
acknowledge
Controller (host) will send a separate start bit.
Controller (host) sends the read address DD
(H)
ICS clock will
acknowledge
ICS clock will send the data byte count = X
ICS clock sends
Byte N + X -1
ICS clock sends
Byte 0 through byte X (if X
(H)
was written to byte 8).
Controller (host) will need to acknowledge each byte
Controllor (host) will send a not acknowledge bit
Controller (host) will send a stop bit
ICS (Slave/Receiver)
T
WR
ACK
P
Byte N + X - 1
Data Byte Count = X
Beginning Byte N
stoP bit
X
B
yt
e
Index Block Write Operation
Slave Address DC(H)
Beginning Byte = N
WRite
starT bit
Controller (Host)
T
starT bit
WR
WRite
RT
Repeat starT
RD
ReaD
Beginning Byte N
Byte N + X - 1
N
Not acknowledge
PstoP bit
ICS (Slave/Receiver)
Controller (Host)
X
Byte
ACK
Data Byte Count = X
ACK
Slave Address DD(H)
Index Block Read Operation
Slave Address DC(H)
Beginning Byte = N
ACK
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