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参数资料
| 型号： | IMISC680CYB |
| 元件分类： | 时钟及定时 |
| 英文描述： | LOW SKEW CLOCK DRIVER, PDSO48 |
| 封装： | SSOP-48 |
| 文件页数： | 4/8页 |
| 文件大小： | 109K |
| 代理商： | IMISC680CYB |
SC680C
I
2C System Clock Buffer
Approved Product
INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST.
Rev.2.3
8/12/98
MILPITAS, CA 95035. TEL: 408-263-6300. FAX 408-263-6571
Page 4 of 8
SERIAL CONTROL REGISTERS (Cont.)
Byte 3: Clock Register (1 = enable, 0 = Stopped)
Bit
@Pup
Pin#
Description
7
1
45
CLK18 (Active = 1, Forced low = 0)
6
1
44
CLK17(Active = 1, Forced low = 0)
5
1
41
CLK16 (Active = 1, Forced low = 0)
4
1
40
CLK15 (Active = 1, Forced low = 0)
3
1
36
CLK14 (Active = 1, Forced low = 0)
2
1
35
CLK13(Active = 1, Forced low = 0)
1
32
CLK12 (Active = 1, Forced low = 0)
0
1
31
CLK11 (Active = 1, Forced low = 0)
Byte 4: Clock Register ( 1 = enable, 0 = Stopped )
Bit
@Pup
Pin#
Description
7
0
28
CLK10 (Active = 1, Forced low = 0)
6
0
21
CLK9 (Active = 1, Forced low = 0)
5
0
-
Not Used
4
0
-
Not Used
3
0
-
Not Used
2
0
-
Not Used
1
-
Not Used
0
1
-
Not Used
MAXIMUM RATINGS
Voltage Relative to VSS:
-0.3V
Voltage Relative to VDD:
0.3V
Storage Temperature:
-65C to + 150C
Operating Temperature:
0C to +70C
Maximum Power Supply:
7V
This device contains circuitry to protect the inputs
against damage due to high static voltages or electric
field; however, precautions should be taken to avoid
application of any voltage higher than the maximum
rated voltages to this circuit. For proper operation, Vin
and Vout should be constrained to the range:
VSS<(Vin or Vout)<VDD
Unused inputs must always be tied to an appropriate
logic voltage level (either VSS or VDD).
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