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参数资料
| 型号： | IN74LV00 |
| 厂商： | INTEGRAL JOINT STOCK COMPANY |
| 英文描述： | Quad 2-Input NAND Gate |
| 中文描述： | 四2输入与非门 |
| 文件页数： | 5/5页 |
| 文件大小： | 41K |
| 代理商： | IN74LV00 |
IN74LV00
5
INTEGRAL
CHIP PAD DIAGRAM IZ74LV00
Pad size 0.108 x 0.108 mm
(Pad size is given as per
metallization
layer)
Thickness of chip 0.46
±
0,02 mm
PAD LOCATION
Pad No
Symbol
X
Y
01
02
03
04
05
06
07
08
09
10
11
12
13
14
A1
B1
Y1
A2
B2
Y2
GND
Y3
A3
B3
Y4
A4
B4
Vcc
0.111
0.111
0.504
0.672
1.009
1.009
1.009
1.009
1.009
0.672
0.504
0.336
0.111
0.111
0.287
0.119
0.111
0.111
0.111
0.277
0.447
0.806
0.974
0.974
0.974
0.974
0.772
0.618
01
02
03
04
05
06
07
08
09
10
11
12
13
14
1
±
1.23 0.03
Chip marking
25LV00
(x=1.009; y=0.727)
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