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参数资料
| 型号： | IP-RSENC |
| 厂商： | Altera |
| 文件页数： | 16/38页 |
| 文件大小： | 0K |
| 描述： | IP REED-SOLOMON ENCODER |
| 标准包装： | 1 |
| 系列： | * |
| 类型： | MegaCore |
| 功能： | Reed-Solomon 编码器 |
| 许可证： | 初始许可证 |
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2–6
Chapter 2: Getting Started
MegaWizard Plug-In Flow
8. For a decoder throughput calculation, enter the frequency in MHz, select the
desired units, and click Calculate . Figure 2–6 shows the decoder throughput
calculation page.
Figure 2–6. Throughput Calculator
For more information about the throughput calculator, refer to “Throughput
Calculator” on page 3–10 .
9. Click Finish .
For more information about the RS Compiler parameters, refer to “Parameters” on
page 3–7 .
Set Up Simulation
An IP functional simulation model is a cycle-accurate VHDL or Verilog HDL model
produced by the Quartus II software. The model allows for fast functional simulation
of IP using industry-standard VHDL and Verilog HDL simulators.
c You may only use these simulation model output files for simulation purposes and
expressly not for synthesis or any other purposes. Using these models for synthesis
creates a nonfunctional design.
To generate an IP functional simulation model for your MegaCore function, follow
these steps:
1. Click Step 2: Set Up Simulation in IP Toolbench. Figure 2–3 on page 2–4 shows
the IP Toolbench.
2. Turn on Generate Simulation Model , as shown in Figure 2–7 .
3. Choose the required language in the Language list.
4. Some third-party synthesis tools can use a netlist that contains only the structure
of the MegaCore function, but not detailed logic, to optimize performance of the
design that contains the MegaCore function. If your synthesis tool supports this
feature, turn on Generate netlist .
Reed-Solomon Compiler
User Guide
November 2013 Altera Corporation
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相关代理商/技术参数 |
参数描述 |
|---|---|
| IPR-SLITE2 | 功能描述:开发软件 SerialLite II MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPR-SRAM/QDRII | 功能描述:开发软件 QDRII SRAM Control MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPR-SSIP | 功能描述:开发软件 Crypto Bundle BU Solution RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPR-TRIETHERNET | 功能描述:开发软件 Triple Speed Ethernt MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPR-TRIETHERNETF | 功能描述:开发软件 3x Spd Ethernet MAC MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
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