参数资料
型号: IP1202TR
厂商: International Rectifier
文件页数: 25/29页
文件大小: 0K
描述: IC REG BUCK SYNC ADJ 30A 198BGA
产品变化通告: (EP) Parts Discontinuation 25/May/2012
标准包装: 750
系列: iPOWIR™
类型: 降压(降压)
输出类型: 可调式
输出数: 2
输出电压: 0.8 V ~ 5 V
输入电压: 5.5 V ~ 13.2 V
频率 - 开关: 200kHz ~ 400kHz
电流 - 输出: 30A
同步整流器:
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 198-BGA(161 凸块)
包装: 带卷 (TR)
供应商设备封装: BGA(15.5x9.25)
iP1202
Layout Guidelines
For stable and noise free operation of the whole
power system, it is recommended that the designer
uses the following guidelines:
1. Follow the layout scheme presented in Fig. 32.
Make sure that the output inductors L1 and L2 are
placed as close to iP1202 as possible to prevent
noise propagation that can be caused by switching
of power at the switching node Vsw, to sensitive cir-
cuits.
2. Provide a mid-layer solid ground plane with con-
nections to the top layer through vias. The PGND
pads of iP1202 also need to be connected to the
same ground plane through vias.
3. To increase power supply noise immunity, place
input and output capacitors close to one another,
as shown in the layout diagram. This will provide
short high current paths that are essential at the
ground terminals.
4. Although there is a certain degree of V IN bypass-
ing inside the iP1202, the external input decoupling
capacitors should be as close to the device as pos-
sible.
5. The Feedback tracks from the outputs V OUT1 and
V OUT2 to FB1 and FB2 respectively, should be routed
as far away from noise generating traces as pos-
sible.
6. The compensation components and the Vref by-
pass capacitor should be placed as close as pos-
sible to their corresponding iP1202 pins.
7. For single output configuration, the parasitic paths
leading to the common output connector from each
parallel branch should be symmetrically routed to
ensure equal current sharing.
8. Refer to IR application note AN-1029 to deter-
mine what size vias and copper weight and thick-
ness to use when designing the PCB.
9. Place the overcurrent threshold setting resistors
R OCSET1 and R OCSET2 close to the iP1202 block at the
corresponding connection nodes.
www.irf.com
Fig. 31: iP1202 suggested layout
25
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