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| 型号： | IQ32B-TQ52 |
| 元件分类： | 数字信号处理外设 |
| 英文描述： | CROSSBAR SWITCH, PQFP52 |
| 封装： | PLASTIC, TQFP-52 |
| 文件页数： | 28/31页 |
| 文件大小： | 620K |
| 代理商： | IQ32B-TQ52 |
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IQ Family Data Sheet
6
January 1999
1.3 I/O Buffer Functions
Table 1 shows the various I/O Port functions that can be programmed and are described below.
In these modes, the Output Enable signal control the active and Hi-Z state. The buffers are driving the pin when the corresponding Output Enable signal (see Table 7) is low, and Hi-Z when
it is high
.
Symbol
I/O Port Function
Mnemonic
Input - The external signal at the I/O Port pin is connected to the corresponding Switch Matrix line
through a buffer.
IN
Registered Input - The external signal at the I/O Port pin is connected to the input of a ip-op and the
output of the ip-op is connected to the corresponding Switch Matrix line. The clock input of the ip-op
is driven by the external clock signal, ICLK. The state of the ip-op is not affected by device reset.
When an I/O Port is congured as an Input (IN) or Registered Input (RI), VIH and VIL are at TTL levels.
RI
Output - The corresponding Switch Matrix line is connected to the I/O Port pin through a buffer.
OP
Registered Output - The corresponding Switch Matrix line is connected to the input of a ip-op, and the
output of the ip-op is connected to the I/O Port pin. The clock input of the ip-op is driven by the
external clock signal, OCLK. The state of the ip-op is not affected by device reset.
RO
Bus Repeater - In the Bus Repeater mode, the I/O Port and the corresponding Switch Matrix line behave
as if they were connected by a wire (with a non-zero propagation delay), allowing bidirectional signal ow.
The Bus Repeater (patented by I-Cube) incorporates a self-sensing circuit to determine signal direction.
When multiple I/O Ports congured as Bus Repeater are connected together through the Switch Matrix to
form a single internal node, a signal appearing at any one of the I/O Ports is repeated to the remaining I/O
Ports that are a part of that node.
The Bus Repeater mode requires an external or internal (see the section on “Programmable Pull-up
Current”) pull-up current source to operate properly. For more details, refer to the Technical Note: “The
Bus Repeater Mode.”
BR
No Connect - The I/O Port pin is isolated from the Switch Matrix line.
Upon reset all I/O Ports are automatically congured as No Connect (NC).
NC
Non-Buffer - The I/O buffer is bypassed and the I/O Port pin is connected to the corresponding Switch
Matrix line through a pass transistor. This mode can be used to pass analog signals if certain conditions
are met. Contact I-Cube for more details.
NB
Pin Side Force 0 - The I/O Port pin is forced low (logic 0) by the internal buffer, regardless of the signal
on the corresponding Switch Matrix line.
F0
Pin Side Force 1 - The I/O Port pin is forced high (logic 1) by the internal buffer, regardless of the signal
on the corresponding Switch Matrix line.
F1
Array Side Force 0 - The Switch Matrix line is forced low (logic 0), regardless of the signal on the
corresponding I/O Port.
A0
Array Side Force 1 - The Switch Matrix line is forced high (logic 1), regardless of the signal on the
corresponding I/O Port.
A1
Table 1. IQ Family I/O Buffer Attributes
REG
T
Px
Ax
OE
Px
Ax
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