IQ Family Data Sheet
January 1999
7
1.4 Output Voltage Level
When an I/O Port is congured in the “output” modes - Output
(OP), Registered Output (RO), and Output Force 1 - the output
high voltage can be programmed as TTL high or CMOS high. In
the Bus Repeater (BR) mode, the output high level is always
CMOS high.
1.5 Programmable Pull-up Current
As shown in gure 4, the I/O buffer contains several pull-up
devices. The normal pull–up current (IOH)is supplied by an n or p
channel device for TTL and CMOS output levels respectively. The
devices supplying the normal pull–up are controlled by internally
generated control signals.
An additional pull–up current (IPU-WK) or (IPU-SG) can be
programmed at each I/O Port. This additional current is primarily
used for the Bus Repeater (BR) mode, but its use is not
restricted to that mode alone. P channel devices, controlled by
programming cells are used to supply the additional pull–up
current; therefore, when this feature is used with one of the
“output” modes - Output (OP), Registered Output (RO), Bus
Repeater (BR), and Output Force 1 (F1) - the outputs high
voltage levels become CMOS levels.
Figure 4. IQ Output Driver and Pull-Up Current
2.0 CONFIGURATION CONTROLLER
The conguration of IQ devices involves initializing internal
Mode/Control register, conguring the I/O Ports and establishing
connections among the Switch Matrix lines. The IQ devices are
ready for conguration as soon as they come out of reset.
The JTAG (IEEE 1149.1) interface, described below is used as
the primary conguration mechanism for conguring IQ devices.
In addition, the RapidConnect parallel mode is available for
changing connections in the Switch Matrix.
2.1 JTAG Interface
The JTAG interface is a serial interface and uses four pins: Test
Data In (TDI), Test Data Out (TDO), Test Clock (TCK), and Test
Mode Select (TMS). TCK is used to clock data in and out of TDI
and TDO. TMS, in conjunction with TDI implements the state
machine that controls the various operations of the JTAG
protocol. In addition, the device reset signal (TRST*) is used to
reset the JTAG controller.
I/O Buffer Function
Data Flow
Tristate Function
Mnemonic Used by
I-Cube Software
Input
Flow–through
No
IN
Registered
No
RI
Output
Flow–through
Yes
OP
Registered
Yes
RO
Bidirectional (Bus Repeater)
Flow–through
Yes
BR
Pin Side Force 0 or 1
N/A
Yes
F0, F1
Array Side Force 0 or 1
N/A
No
A0, A1
Non Buffered
Flow–through
No
NB
No Connect
N/A
NC
Table 2. Summary of Programmable I/O Attributes for IQ Devices
PUPTTL
PUPCMOS
PDN
A) Pull Down
B) Pull Up (TTL Voltage)
C) Pull Up (CMOS Voltage)
D) Additional Weak Pull Up
E) Additional Strong Pull Up
E
D
C
A
B