参数资料
型号: IR3084UMPBF
厂商: International Rectifier
文件页数: 10/47页
文件大小: 0K
描述: IC XPHASE CONTROL 28-MLPQ
标准包装: 100
系列: XPhase™
应用: 处理器
电流 - 电源: 14mA
电源电压: 9.5 V ~ 16 V
工作温度: 0°C ~ 100°C
安装类型: 表面贴装
封装/外壳: 28-MLPQ
供应商设备封装: 28-MLPQ(5x5)
包装: 剪切带 (CT)
IR3084U
PWM Control Method
The PWM block diagram of the XPhase
TM
architecture is shown in Figure 3. Feed-forward voltage mode control
with trailing edge modulation is used. A high-gain wide-bandwidth voltage type error amplifier in the Control IC is
used for the voltage control loop. An external RC circuit connected to the input voltage and ground is used to
program the slope of the PWM ramp and to provide the feed-forward control at each phase. The PWM ramp
slope will change with the input voltage and automatically compensate for changes in the input voltage. The input
voltage can change due to variations in the silver box output voltage or due to drops in the PCB related to
changes in load current.
VIN
CONTROL IC
BIASIN
SYSTEM
REFERENCE
PHASE IC
50%
RAMP GENERATOR
VOLTAGE
PWM
DUTY
CYCLE
VPEAK
RMPOUT
RAMPIN+
CLOCK
PULSE
S
LATCH
GATEH
VOSNS+
VVALLEY
RRAMP1
RAMPIN-
GENERATOR
PWM
COMPARATOR
RESET
DOMINANT
VOUT
+
-
VBIAS
REGULATOR
VDAC
VBIAS
VOSNS-
VDAC
VSETPT
RVSETPT
RRAMP2
RPWMRMP
EAIN
PWMRMP
SCOMP
RAMP
SLOPE
ADJUST
-
+
ENABLE
RAMP
DISCHARGE
CLAMP
R
O% DUTY
CYCLE
COMPARATOR
GATEL
COUT
GND
VOSNS-
CPWMRMP
EAOUT
CSCOMP
SHARE
ADJUST
ERROR
AMP
ERROR
AMP
+
X
0.91
FB
RVFB
ISHARE
10K
-
20mV
CURRENT
SENSE
AMP
CSIN+
CCS
RCS
X34
CSIN-
IOFFSET
IROSC
VDRP
AMP
RDRP
DACIN
VDRP
IIN
PHASE IC
BIASIN
SYSTEM
REFERENCE
VOLTAGE
PWM
RRAMP1
RAMPIN+
CLOCK
PULSE
S
LATCH
GATEH
RAMPIN-
GENERATOR
PWM
COMPARATOR
RESET
DOMINANT
EAIN
-
+
R
GATEL
RRAMP2
RPWMRMP
PWMRMP
RAMP
SLOPE
ADJUST
ENABLE
RAMP
DISCHARGE
O% DUTY
CYCLE
COMPARATOR
CPWMRMP
CSCOMP
SCOMP
SHARE
ADJUST
CLAMP
ERROR
AMP
+
X
0.91
ISHARE
10K
-
20mV
CURRENT
SENSE
AMP
CSIN+
CCS
RCS
X34
CSIN-
DACIN
Figure 3 – IR3084U PWM Block Diagram
Frequency and Phase Timing Control
The oscillator is located in the Control IC and its frequency is programmable from 150kHz to 1MHZ by an external
resistor. The output of the oscillator is a 50% duty cycle triangle waveform with peak and valley voltages of
approximately 5V and 1V. This signal is used to program both the switching frequency and phase timing of the
Phase ICs. The Phase IC is programmed by resistor divider RRAMP1 and RRAMP2 connected between the
VBIAS reference voltage and the Phase IC LGND pin. A comparator in the Phase ICs detects the crossing of the
oscillator waveform with the voltage generated by the resistor divider and triggers a clock pulse that starts the
PWM cycle. The peak and valley voltages track the VBIAS voltage reducing potential Phase IC timing errors.
Figure 4 shows the Phase timing for an 8 phase converter. Note that both slopes of the triangle waveform can be
used for synchronization by swapping the RAMP + and – pins.
Page 10 of 47
June 1, 2009
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