参数资料
型号: IR3084UMPBF
厂商: International Rectifier
文件页数: 8/47页
文件大小: 0K
描述: IC XPHASE CONTROL 28-MLPQ
标准包装: 100
系列: XPhase™
应用: 处理器
电流 - 电源: 14mA
电源电压: 9.5 V ~ 16 V
工作温度: 0°C ~ 100°C
安装类型: 表面贴装
封装/外壳: 28-MLPQ
供应商设备封装: 28-MLPQ(5x5)
包装: 剪切带 (CT)
IR3084U
PIN DESCRIPTIONS
PIN#
1
2
3-9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
PIN SYMBOL
VIDSEL
INTL_MD
VID6?VID0
VOSNS?
ROSC
VDAC
OCSET
VSETPT
IIN
VDRP
FB
EAOUT
RMPOUT
VBIAS
VCC
LGND
REGFB
REGDRV
REGSET
SS/DEL
VRRDY
ENABLE
Page 8 of 47
DESCRIPTION
Selects the DAC table and the type of Soft Start. There are 3 possible modes of
operation: (1) GND selects VR10 DAC and VR11 type startup, (2) FLOAT (2.4V)
selects VR11 DAC and VR11 type startup, (3) 6.49K to GND (1.3V) selects
Opteron/Athlon64 DAC and legacy type startup. Additional details are provided in
the Theory of Operation section.
Output that indicates if the controller is in Intel Mode or AMD Mode. This pin will be
Low when in AMD mode and High when in Intel mode.
Inputs to the D to A Converter. Must be connected to an external pull up resistor.
Negative Remote Sense Input. Connect to ground at the Load.
Connect a resistor from this pin to VOSNS? to program the oscillator’s frequency,
OCSET, VSETPT, REGSET, and VDAC bias currents.
Regulated output voltage programmed by the VID inputs. Connect an external RC
network to from this pin to VOSNS? to program the Dynamic VID slew rate and
provide compensation for the internal Buffer Amplifier.
Programs the hiccup over-current threshold through an external resistor tied to
VDAC and an internal current source. Over-current protection can be disabled by
connecting a resistor from this pin to VDAC to program the threshold higher than the
possible signal into the IIN pin from the Phase ICs but no greater than 5V (do not
float this pin as improper operation will occur).
Error Amp non-inverting input. The converter’s output voltage can be decreased
(Intel) or increased (AMD) from the VDAC voltage with an external resistor
connected between VDAC and an internal current source. Current sensing and
PWM operation are referenced to this pin.
Current Sense input from the Phase IC(s). Prior to startup, when SS/DEL<0.6V, this
pin is pulled low by a 12.5K resistor to disable current balancing in the Phase ICs.
When SS/DEL>0.6V and EAOUT>0.35V, this pin is released and current balancing
is enabled. If AVP or over-current protection is not required, connect this pin to
VDAC. To ensure proper do not float this pin.
Buffered IIN signal. Connect an external resistor from this pin to the FB pin to set the
converter’s output impedance.
Inverting input to the Error Amplifier.
Output of the Error Amplifier. When Low, provides UVL function to the Phase ICs.
Oscillator Output voltage. Used by the Phase ICs to program Phase Delay.
6.9V/6mA Regulated output used as a system reference voltage for internal circuitry
and for phase timing at the Phase ICs.
Power Input for the internal circuitry.
Local Ground for internal circuitry and IC substrate connection
Inverting input of the Bias Regulator Error Amp. Connect this pin to the collector of
the Phase IC Gate Driver Bias transistor.
Output of the Bias Regulator Error Amp.
Non-inverting input of the Bias Regulator Error Amp. The output voltage of the
Phase IC Gate Driver Bias Regulator is set by an internal current source supplying
an external resistor connected from this pin to ground.
Controls converter start-up and over-current timing. Connect an external capacitor
from this pin to LGND to program the soft start and delay times.
Open Collector output that drives low during start-up and when any external fault
occurs. Connect external pull-up resistor.
Enable Input. A logic low applied to this pin puts the IC into Fault mode. This pin
has a 100K pull-down resistor to GND.
June 1, 2009
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