参数资料
型号: IR3087MPBF
厂商: International Rectifier
文件页数: 15/35页
文件大小: 0K
描述: IC XPHASE W/OVP/TM CTRL 20MLPQ
标准包装: 5
系列: XPhase™
应用: 处理器
电流 - 电源: 10mA
电源电压: 8.4 V ~ 21 V
工作温度: 0°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 20-MLPQ
供应商设备封装: 20-MLPQ(4x4)
包装: 剪切带 (CT)

IR3087PBF
DESIGN PROCEDURES - IR3081A AND IR3087 CHIPSET
IR3081A EXTERNAL COMPONENTS
Oscillator Resistor Rosc
The oscillator of IR3081A generates a triangle waveform to synchronize the phase ICs, and the switching frequency
of the each phase converter equals the oscillator frequency, which is set by the external resistor R OSC according to
the curve in Figure 13.
Soft Start Capacitor C SS/DEL
Because the capacitor C SS/DEL programs four different time parameters, i.e. soft start delay time, soft start time,
over-current latch delay time, and power good delay time, they should be considered together while choosing
C SS/DEL .
The SS/DEL pin voltage controls the slew rate of the converter output voltage, as shown in Figure 10. After the
ENABLE pin voltage rises above 0.6V, there is a soft-start delay time t SSDEL, after which the error amplifier output is
released to allow the soft start. The soft start time t SS represents the time during which converter voltage rises from
zero to V O. t SS can be programmed by an external capacitor, which is determined by Equation (1).
C SS / DEL =
I CHG * t SS
V O
=
70 * 10 ? 6 * t SS
V O
(1)
Once C SS/DEL is chosen, the soft start delay time t SSDEL, the over-current fault latch delay time t OCDEL , and the
delay time t VccPG from output voltage (V O ) in regulation to Power Good are fixed and shown in Equations (2), (3)
and (4) respectively.
t SSDEL =
C SS / DEL * 1 . 3
I CHG
=
C SS / DEL * 1 . 3
70 * 10 ? 6
(2)
t OCDEL =
C SS / DEL * 0 . 115
I OCDISCHG
=
C SS / DEL * 0 . 115
40 * 10 ? 6
(3)
t VccPG =
C SS / DEL * ( 3 . 8 ? 0 . 065 ? V O ? 1 . 3 )
I CHG
=
C SS / DEL * ( 3 . 735 ? V O ? 1 . 3 )
70 * 10 ? 6
(4)
VDAC Slew Rate Programming Capacitor C VDAC and Resistor R VDAC
The slew rate of VDAC down-slope SR DOWN can be programmed by the external capacitor C VDAC as defined in
Equation (5), where I SINK is the sink current of VDAC pin as shown in Figure 15. The resistor R VDAC is used to
compensate VDAC circuit and is determined by Equation (6). The slew rate of VDAC up-slope SR UP is proportional
to that of VDAC down-slope and is given by Equation (7), where I SOURCE is the source current of VDAC pin as
shown in Figure15.
C VDAC =
I SINK
SR DOWN
(5)
R VDAC = 0 . 5 +
3 . 2 ? 10 ? 15
C VDAC 2
(6)
Page 15 of 35
SR UP =
I SOURCE
C VDAC
(7)
1 /31/05
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