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参数资料
| 型号： | IR3087MPBF |
| 厂商： | International Rectifier |
| 文件页数： | 31/35页 |
| 文件大小： | 0K |
| 描述： | IC XPHASE W/OVP/TM CTRL 20MLPQ |
| 标准包装： | 5 |
| 系列： | XPhase™ |
| 应用： | 处理器 |
| 电流 - 电源： | 10mA |
| 电源电压： | 8.4 V ~ 21 V |
| 工作温度： | 0°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-MLPQ |
| 供应商设备封装： | 20-MLPQ（4x4） |
| 包装： | 剪切带 (CT) |
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IR3087PBF
LAYOUT GUIDELINES
The following layout guidelines are recommended to reduce the parasitic inductance and resistance of the PCB
layout, therefore minimizing the noise coupled to the IC.
? Dedicate at least one middle layer for a ground plane, which is then split into signal ground plane (LGND) and
power ground plane (PGND).
? Connect PGND to LGND pins of each phase IC to the ground tab, which is tied to LGND and PGND planes
respectively through vias.
? In order to reduce the noise coupled to SCOMP pin of phase IC, use a dedicated wire to connect the capacitor
C SCOMP directly to LGND pin. However, connect PWM ramp capacitor C PWMRMP , phase delay programming
resistor R PHASE2 or R PHASE3, decoupling capacitor C VCC to LGND plane through vias.
? Place current sense resistors and capacitors (R CS+ , R CS- , C CS+ , and C CS- ) close to phase IC. Use Kelvin
connection for the inductor current sense wires, but separate the two wires by ground polygon. The wire from
the inductor terminal to RCS- should not cross over the fast transition nodes, i.e. switching nodes, gate drive
outputs and bootstrap nodes.
? Place the decoupling capacitors C VCC and C VCCL as close as possible to VCC and VCCL pins of the phase IC
respectively.
? Place the phase IC as close as possible to the MOSFETs to reduce the parasitic resistance and inductance of
the gate drive paths.
? Place the input ceramic capacitors close to the drain of top MOSFET and the source of bottom MOSFET. Use
combination of different packages of ceramic capacitors.
? There are two switching power loops. One loop includes the input capacitors, top MOSFET, inductor, output
capacitors and the load; another loop consists of bottom MOSFET, inductor, output capacitors and the load.
Route the switching power paths using wide and short traces or polygons; use multiple vias for connections
between layers.
LGND
To Signal Bus
PLANE
To VIN
To LGND
Plane
To LGND
Plane
To Gate
Drive
Voltage
SCOMP
EAIN
PWMRMP
LGND
BIASIN
DACIN
OPTIPHS
CSIN-
To LGND
C VCC
VCC
CSIN+
Plane
To PGND
Plane
C VCCL
To Bottom To Top
MOSFET MOSFET
Ground
Polygon
Ground
Polygon
Page 31 of 35
PGND
PLANE
To
Switching
Node
To Inductor
1/31/05
相关PDF资料 |
PDF描述 |
|---|---|
| IR3087M | IC XPHASE W/OVP/TM CTRL 20-MLPQ |
| IR3088AMPBF | IC XPHASE CONTROL 20L-MLPQ |
| IR3088AMTR | IC XPHASE W/FAULT DET 20L-MLPQ |
| IR3088MTRPBF | IC CTLR XPHASE 28-MLPQ |
| IR3092MTRPBF | IC CONTROLLER 2PHASE 48-MLPQ |
相关代理商/技术参数 |
参数描述 |
|---|---|
| IR3087MTR | 功能描述:IC XPHASE W/OVP/TM CTRL 20L-MLPQ RoHS:否 类别:集成电路 (IC) >> PMIC - 电源管理 - 专用 系列:XPhase™ 应用说明:Ultrasound Imaging Systems Application Note 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:37 系列:- 应用:医疗用超声波成像，声纳 电流 - 电源:- 电源电压:2.37 V ~ 6 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:56-WFQFN 裸露焊盘 供应商设备封装:56-TQFN-EP（8x8） 包装:管件 |
| IR3087MTRPBF | 功能描述:IC CONTROLLER PHASE 20MLPQ RoHS:是 类别:集成电路 (IC) >> PMIC - 电源管理 - 专用 系列:XPhase™ 应用说明:Ultrasound Imaging Systems Application Note 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:37 系列:- 应用:医疗用超声波成像，声纳 电流 - 电源:- 电源电压:2.37 V ~ 6 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:56-WFQFN 裸露焊盘 供应商设备封装:56-TQFN-EP（8x8） 包装:管件 |
| IR3087PBF | 制造商:IRF 制造商全称:International Rectifier 功能描述:XPHASETM PHASE IC WITH OPTI-PHASETM, OVP, AND OVERTEMP DETECT |
| IR3088 | 制造商:IRF 制造商全称:International Rectifier 功能描述:XPHASE PHASE IC WITH FAULT AND OVERTEMP DETECT |
| IR3088A | 制造商:IRF 制造商全称:International Rectifier 功能描述:XPHASETM PHASE IC WITH FAULT AND OVERTEMP DETECT |
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