参数资料
型号: IR3087MPBF
厂商: International Rectifier
文件页数: 19/35页
文件大小: 0K
描述: IC XPHASE W/OVP/TM CTRL 20MLPQ
标准包装: 5
系列: XPhase™
应用: 处理器
电流 - 电源: 10mA
电源电压: 8.4 V ~ 21 V
工作温度: 0°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 20-MLPQ
供应商设备封装: 20-MLPQ(4x4)
包装: 剪切带 (CT)
IR3087PBF
Opti-Phase Resistors R OP1 and R OP2
A resistor divider is used to program OPTIPHS pin voltage, which represents the load current threshold below which
the phase is shut down to reduce the switching loss. Pre-select R OP1 , and calculate R OP2 according to Equation
(25), where I O_OP is the Opti-Phase shedding current threshold.
R OP 2 =
R OP 1 ? [( I O _ OP / n ) ? R L + V CS _ TOFST ] * G CS
V BIAS ? [( I O _ OP / n ) ? R L + V CS _ TOFST ] ? G CS
(25)
The connection of OPTIPHS pin to VBIAS pin disables this function and keeps the phase always on.
VOLTAGE LOOP COMPENSATION
The adaptive voltage positioning (AVP) is usually adopted in the computer applications to improve the transient
response and reduce the power loss at heavy load. Like current mode control, the adaptive voltage positioning loop
introduces extra zero to the voltage loop and splits the double poles of the power stage, which make the voltage
loop compensation much easier.
Resistors R FB and R DRP are chosen according to Equations (13) and (14), and the selection of compensation types
depends on the output capacitors used in the converter. For the applications using Electrolytic, Polymer or AL-
Polymer capacitors and running at lower frequency, type II compensation shown in Figure 8(a) is usually enough.
While for the applications using ceramic capacitors and running at higher frequency, type III compensation shown in
Figure 8(b) is preferred.
For applications where AVP is not required, the compensation is the same as for the regular voltage mode control.
For converter using Polymer, AL-Polymer, and ceramic capacitors, which have much higher ESR zero frequency,
type III compensation is required as shown in Figure 8(b) with R DRP and C DRP removed.
CCP1
CCP1
VO+
RFB
RCP
CCP
RCP
CCP
RFB1
CFB
FB
-
VO+
RFB
FB
-
EAOUT
EAOUT
VDRP
RDRP
VDAC
+
EAOUT
EAOUT
VDRP
RDRP
VDAC
+
CDRP
(a) Type II compensation
(b) Type III compensation
Figure 8. Voltage loop compensation network
Page 19 of 35
1 /31/05
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