参数资料
型号: IR3500AMPBF
厂商: International Rectifier
文件页数: 4/48页
文件大小: 0K
描述: IC CTRL XPHASE3 VR11.0 32-MLPQ
标准包装: 100
系列: XPhase3™
应用: 处理器
电流 - 电源: 6.5mA
电源电压: 4.75 V ~ 7.5 V
工作温度: 0°C ~ 100°C
安装类型: 表面贴装
封装/外壳: 32-VFQFN 裸露焊盘
供应商设备封装: 32-MLPQ(5x5)
包装: 管件
IR3500A
PARAMETER
TEST CONDITION
MIN
TYP
MAX
UNIT
Soft Start and Delay
Start Delay (TD1)
1.0
2.9
3.5
Ms
Soft Start Time (TD2)
VID Sample Delay (TD3)
PGOOD Delay (TD4 + TD5)
OC Delay Time
SS/DEL to FB Input Offset
To reach 1.1V
V(IIN) – V(OCSET) = 500 mV
With FB = 0V, adjust V(SS/DEL) until
0.8
0.3
0.5
75
0.7
2.2
1.2
1.2
125
1.4
3.25
3.0
2.3
300
1.9
Ms
Ms
Ms
us
V
Voltage
EAOUT drives high
Charge Current
Discharge Current
Charge/Discharge Current Ratio
Charge Voltage
Delay Comparator Threshold
Relative to Charge Voltage, SS/DEL
35.0
2.5
10
52.5
4.5
12
3.75
80
70.0
6.5
16
μ A
μ A
μ A/ μ A
V
mV
rising
Delay Comparator Threshold
Relative to Charge Voltage, SS/DEL
110
mV
falling
Delay Comparator Hysteresis
VID Sample Delay Comparator
Threshold
30
3.0
mV
V
Discharge Comp. Threshold
150
200
275
mV
Remote Sense Differential Amplifier
Unity Gain Bandwidth Note 1
Input Offset Voltage 0.5V ≤ V(VOSEN+) - V(VOSEN-) ≤ 1.6V
Source Current 0.5V ≤ V(VOSEN+) - V(VOSEN-) ≤ 1.6V
Sink Current 0.5V ≤ V(VOSEN+) - V(VOSEN-) ≤ 1.6V
Slew Rate 0.5V ≤ V(VOSEN+) - V(VOSEN-) ≤ 1.6V
3.0
-3
0.5
2
2
6.4
0
1.0
12
4
9.0
3
1.7
18
8
MHz
mV
mA
mA
V/us
Note1
VOSEN+ Bias Current 0.5 V < V(VOSEN+) < 1.6V
VOSEN- Bias Current -0.3V ≤ VOSEN- ≤ 0.3V, All VID Codes
VOSEN+ Input Voltage Range V(VCCL)=7V
High Voltage V(VCCL) – V(VO)
Low Voltage V(VCCL)=7V
30
30
0.5
50
50
5.5
1
250
uA
uA
V
V
mV
Error Amplifier
Input Offset Voltage Measure V(FB) – V(VSETPT). Note 2
FB Bias Current
VSETPT Bias Current R OSC = 24.5 K
DC Gain Note 1
Bandwidth Note 1
Slew Rate Note 1
Sink Current
Source Current
Minimum Voltage
Maximum Voltage Measure V(VCCL) – V(EAOUT)
-1
-1
23.00
100
20
7
0.40
5
500
0
0
24.25
110
30
12
0.85
8
120
780
1
1
25.50
120
40
20
1.00
12
250
950
mV
μ A
μ A
dB
MHz
V/ μ s
mA
mA
mV
mV
Page 4 of 48
July 28, 2009
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