参数资料
型号: IR3502MTRPBF
厂商: International Rectifier
文件页数: 23/39页
文件大小: 0K
描述: IC XPHASE3 CONTROLLER 32-MLPQ
标准包装: 1
系列: XPhase3™
应用: 处理器
电流 - 电源: 8mA
电源电压: 8 V ~ 16 V
工作温度: 0°C ~ 100°C
安装类型: 表面贴装
封装/外壳: 32-VFQFN 裸露焊盘
供应商设备封装: 32-MLPQ(5x5)
包装: 标准包装
产品目录页面: 1383 (CN2011-ZH PDF)
其它名称: IR3502MTRPBFDKR
IR3502
In the event of a high side MOSFET short before power up, the OVP flag is activated with as little supply voltage as
possible, as shown in Figure 14. The VOSEN+ pin is compared against a fixed voltage of 1.73V (typical) for OVP
conditions at power-up. The ROSC/OVP pin will be pulled higher than 1.6V with VCCLDRV voltage as low as 1.8V.
An external MOSFET or comparator should be used to disable the silver box, activate a crowbar, or turn off the supply
source. The 1.8V threshold is used to prevent false over-voltage triggering caused by pre-charging of output
capacitors.
Pre-charging of converter may trigger OVP. If the converter output is pre-charged above 1.73V as shown in Figure 15,
ROSC/OVP pin voltage will be higher than 1.6V when VCCLDRV voltage reaches 1.8V. ROSC/OVP pin voltage will
be VCCLDRV-1V and rise with VCCLDRV voltage until VCCL is above UVLO threshold, after which ROSC/OVP pin
voltage will be VCCL-1V. The converter cannot start unless the over voltage condition stops and VCCL is cycled. If
the converter output is pre-charged 130mV above VDAC but lower than 1.73V, as shown in Figure 16, the converter
will soft start until SS/DEL voltage is above 3.92V (4.0V-0.08V). Then, over voltage comparator is activated and fault
latch is set.
VID
(FAST
VDAC)
VDAC
OV
1.73V
THRESHOLD
VDAC + 130mV
OUTPUT
VOLTAGE
(VO)
VDAC
50mV
50mV
NORMAL
OPERATION
VID DOWN
LOW VID
VID UP
NORMAL
OPERATION
Figure 17 Over-voltage protection during dynamic VID
During dynamic VID down, OVP may be triggered when output voltage can not follow VDAC voltage change at light
load with large output capacitance. Therefore, over-voltage threshold is raised to 1.73V from VDAC+130mV
whenever dynamic VID is detected and the difference between output voltage and VDAC is more than 50mV, as
shown in Figure 19. The over-voltage threshold is changed back to VDAC+130mV if the difference is smaller than
50mV.
VID Fault Codes
VID codes of 0000000X and 1111111X for VR11 will set the fault latch and disable the error amplifier. A 1.3us delay
is provided to prevent a fault condition from occurring during Dynamic VID changes. A VID FAULT condition is
latched for VR 11 with boot voltage and can only be cleared by cycling power to VCCL or re-issuing ENABLE.
Voltage Regulator Ready (VRRDY)
The VRRDY pin is an open-collector output and should be pulled up to a voltage source through a resistor. After the
soft start completion cycle, the VRRDY remains high until the output voltage is in regulation and SS/DEL is above
3.92V. The VRRDY pin becomes low if the fault latch, over voltage latch, open sense line latch, or open daisy chain
Page 23 of 39
July 28, 2009
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