参数资料
型号: IR3504MTRPBF
厂商: International Rectifier
文件页数: 1/42页
文件大小: 0K
描述: IC CTRL XPHASE3 SVID 32-MLPQ
标准包装: 3,000
系列: XPhase3™
应用: 处理器
电流 - 电源: 10mA
电源电压: 4.75 V ~ 7.5 V
工作温度: 0°C ~ 100°C
安装类型: 表面贴装
封装/外壳: 32-VFQFN 裸露焊盘
供应商设备封装: 32-MLPQ(5x5)
包装: 带卷 (TR)
IR3504
DATA SHEET
XPHASE3 TM AMD SVID CONTROL IC
DESCRIPTION
The IR3504 Control IC combined with an xPHASE3
TM
Phase IC provides a full featured and flexible way to
number of Phase ICs each driving and monitoring a single phase. The xPHASE3
architecture results in a
implement a complete AMD SVID power solution. It provides outputs for both the VDD core and VDDNB
auxiliary planes required by the CPU. The IR3504 provides overall system control and interfaces with any
TM
power supply that is smaller, less expensive, and easier to design while providing higher efficiency than
conventional approaches.
FEATURES
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2 converter outputs for the AMD processor VDD core and VDDNB auxiliary planes
AMD Serial VID interface independently programs both output voltages and operation
Both Converter Outputs boot to 2-bit “Boot” VID codes which are read and stored from the SVC & SVD
parallel inputs upon the assertion of the Enable input
PWROK input signal activates SVID after successful boot start-up
Both Converter Outputs can be independently turned on and off through SVID commands
Deassertion of PWROK prior to Enable causes the converter output to transition to the stored Pre-
PWROK VID codes
Connecting the PWROK input to VCCL disables SVID and implements VFIX mode with both output
voltages programmed via SVC & SVD parallel inputs per the 2 bit VFIX VID codes
PG monitors output voltage, PG will deassert if either ouput voltage out of spec
0.5% overall system set point accuracy
Programmable Dynamic VID Slew Rates
Programmable VID Offset (VDD output only)
Programmable output impedance (VDD output only)
High speed error amplifiers with wide bandwidth of 20MHz and fast slew rate of 10V/us
Remote sense amplifiers provide differential sensing and require less than 50uA bias current
Programmable per phase switching frequency of 250kHz to 1.5MHz
Daisy-chain digital phase timing provides accurate phase interleaving without external components
Hiccup over current protection with delay during normal operation
Central over voltage detection and communication to phase ICs through IIN (ISHARE) pin
OVP disabled during dynamic VID down to prevent false triggering
Detection and protection of open remote sense lines
Gate Drive and IC bias linear regulator control with programmable output voltage and UVLO
Simplified Power Good (PG) Output provides indication of proper operation and avoids false triggering
Small thermally enhanced 32L MLPQ (5mm x 5mm) package
Over voltage signal to system with over voltage detection during powerup and normal operation
ORDERING INFORMATION
Device
IR3504MTRPBF
* IR3504MPBF
* Samples only
Page 1
Package
32 Lead MLPQ (5 x 5 mm body)
32 Lead MLPQ (5 x 5 mm body)
Order Quantity
3000 per reel
100 piece strips
July 28, 2009
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